Cache Memory Analysis via Set-Based Contention Segmentation

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Solution Overview

Problem

Existing cache memory analysis methods fail to effectively detect memory access addresses that reduce cache misses, particularly due to the lack of consideration for access contention in actual operation states, leading to inefficiencies in reducing cache misses.

Innovation Solution

A cache memory analyzing method that reads and totals cache miss information, sectionalizes addresses by set, and extracts address groups with consistent or close cache miss numbers to identify addresses with high efficiency for reducing cache misses, using a threshold value to determine contention and prioritize address groups with fewer members.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the address with the largest number of cache misses is detected as the memory access data with high efficiency for reducing cache miss, then the cache miss can be reduced, but the access contention of the cache memory is not considered leading to ineffective detection

Engineering Contradiction:
Improvedetection accuracy of cache miss reduction efficiencyVSAvoidanalysis complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the analysis by dividing addresses into groups based on their set numbers in the cache memory. Addresses are classified into multiple groups according to their set affiliation, and within each group, addresses with similar cache miss counts are identified. This segmentation allows the system to consider access contention within the same set while maintaining manageable analysis complexity through structured classification.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary classification mechanism that groups addresses by their set numbers and cache miss counts. This intermediary classification structure serves as a mediator between raw cache miss data and the final identification of high-efficiency addresses, enabling the system to account for access contention relationships without requiring complex direct analysis of all address interactions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If the cache miss analysis is performed without considering access contention, then the analysis process is simpler, but the detected address may not actually have high efficiency for reducing cache miss

Engineering Contradiction:
Improveanalysis process simplicityVSAvoidcache miss reduction efficiency detection
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent simplifies the analysis process by segmenting addresses into groups based on set numbers and cache miss counts. This segmentation creates a structured framework that is easier to process than analyzing all address interactions directly, while still capturing the essential contention relationships within each group.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by focusing analysis on addresses within the same set that have similar cache miss counts. Rather than analyzing all possible address combinations, the method selectively examines specific groups of addresses, reducing computational effort while maintaining detection accuracy for high-efficiency addresses.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If addresses are sectionalized by set and address groups with consistent cache miss numbers are extracted, then the access contention is considered, but the processing complexity increases

Engineering Contradiction:
Improvecache miss reduction efficiency detectionVSAvoidanalysis processing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments addresses into groups based on set numbers and cache miss counts, creating a structured classification system. This segmentation enables efficient processing by organizing data in a way that facilitates quick identification of addresses with similar characteristics, improving both accuracy and processing efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameters used for analysis by grouping addresses not just by set number but also by cache miss count ranges. This parameter transformation converts raw cache miss data into classified groups, enabling faster comparison and identification of high-efficiency addresses through standardized categories.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7590792B2Cache memory analyzing method
Publication Date: 2009.09.15 SOCIONEXT INC
  • US7590792B2 patent drawing
  • US7590792B2 patent drawing
  • US7590792B2 patent drawing

AI summary

It is done to read information containing an address of a memory at which a cache miss is generated, from a cache memory. The numbers of cache misses generated at each cache miss generated address contained in the information are totalized. The cache miss generated addresses whose generated cache miss numbers are totalized are sectionalized by each of the sets. Further, the address group whose numbers of cache miss generated are consistent or close is extracted from a plurality of cache miss generated addresses divided as addresses in the same set.