Cache Memory Partitioning for Data Reliability

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Solution Overview

Problem

Conventional memory sub-systems with a smaller number of cache memory devices struggle to implement high-reliability cache memory techniques due to insufficient discrete devices to effectively distribute data and reconstruct data using error correcting codes, leading to potential data loss in case of failures.

Innovation Solution

The memory sub-system partitions cache memory into a cache portion and a write buffer portion, where write data is stored in the cache portion and a duplicate copy is stored in the write buffer portion accessible via a different channel, allowing for data recovery in case of channel failures by using write buffer records to map locations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional memory sub-systems use a smaller number of cache memory devices, then device complexity is reduced, but data reliability deteriorates due to insufficient devices for effective data distribution and error correction

Engineering Contradiction:
Improvenumber of discrete cache memory devicesVSAvoiddata reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The cache memory is segmented into two distinct portions: a cache portion for storing write data and a write buffer portion for storing duplicate copies. This segmentation allows the system to achieve data redundancy and reliability without requiring a large number of discrete cache memory devices, as the write buffer portion acts as an independent failure recovery mechanism.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements data copying by storing duplicate copies of write data in the write buffer portion. This copying mechanism provides redundancy that enables data recovery in case of channel failures or device failures, thereby improving reliability without proportionally increasing the number of discrete memory devices.

Inventive Principle:
Principle #26Copying

2Device complexity

If cache memory stores only write data in a single location, then device complexity is reduced, but data reliability deteriorates due to inability to recover from channel failures

Engineering Contradiction:
Improvecache memory structureVSAvoiddata recovery capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The write buffer portion is prepared in advance to store duplicate copies of write data before failures occur. This preliminary action ensures that when channel failures or device failures happen, the system can immediately recover data from the pre-stored duplicates without needing complex real-time recovery mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The write buffer portion serves as an intermediary between the cache portion and the final data storage. It acts as a buffer that receives duplicate copies of data and provides them for recovery operations, thereby enabling data recovery capability while maintaining a relatively simple overall cache memory structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the memory sub-system uses write buffer records to map locations, then data recovery capability is improved, but device complexity increases due to additional mapping structures

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidmapping structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of using complex mapping structures, the patent uses write buffer records that store duplicate copies of the mapping information itself. This copying approach simplifies the recovery process, as the records contain all necessary location mapping data needed to reconstruct the cache memory state after failures.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11704247B2Enhanced duplicate write data tracking for cache memory
Publication Date: 2023.07.18 MICRON TECHNOLOGY INC
  • US11704247B2 patent drawing
  • US11704247B2 patent drawing
  • US11704247B2 patent drawing

AI summary

Data is stored at a cache portion of a cache memory of a memory sub-system responsive to a request to perform a write operation to write the data. A duplicate copy of the data is stored at a write buffer portion of the cache memory. The cache memory is partitioned into the cache portion and the write buffer portion. An entry that maps a location of the duplicate copy of the data stored at the write buffer portion of the cache memory to a location of the data stored at the cache portion of the cache memory is recorded in a write buffer record.