Cache Memory Protection Descriptor Merging
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Solution Overview
Problem
Data processing systems face challenges in efficiently managing memory access permissions across multiple processor cores and bus masters, requiring a large number of descriptors to handle non-contiguous memory ranges with different access authorities, which can be resource-intensive.
Innovation Solution
Implementing a memory protection system with local and global MPUs that use region descriptors to enforce memory access policies, allowing or denying access based on permission information and request attributes, and storing global permission information in cache lines to reduce descriptor overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple descriptors are used to support non-contiguous memory ranges with different access authorities, then memory access control precision is improved, but device complexity and resource space increase
Solution Approach 1:
The patent segments memory space into distinct regions, each with its own access authority rules. By dividing the memory address space into multiple regions and assigning different permission sets to each region, the system achieves fine-grained access control without requiring a separate descriptor for every possible access scenario. This segmentation approach allows the MPU to efficiently manage complex memory protection requirements with a reduced number of descriptors.
2Reliability
If global MPU is queried for every memory access request, then access control reliability is improved, but processing speed decreases
Solution Approach 1:
The patent implements preliminary action by pre-configuring the global MPU with comprehensive memory protection rules before runtime operations. The global MPU establishes region descriptors and access authorities in advance, allowing local MPUs to independently enforce these pre-determined rules without requiring real-time queries to the global MPU. This preliminary configuration ensures access control reliability while eliminating the performance penalty of frequent global MPU queries.
3Speed
If local MPU uses only local descriptors, then processing speed is improved, but access control versatility decreases
Solution Approach 1:
The patent implements universality by designing the local MPU to handle multiple types of memory access requests (instruction fetches, data reads, data writes) using a unified set of region descriptors. The same descriptors that control data access also control instruction access, eliminating the need for separate descriptor sets for different access types. This multi-functional approach maintains processing speed while providing comprehensive access control versatility across all memory access operations.
Data Source
AI summary
A system and method are disclosed for determining whether to allow or deny an access request based upon one or more descriptors at a local memory protection unit and based upon one or more descriptors a system memory protection unit. When multiple descriptors of a memory protection unit apply to a particular request, the least-restrictive descriptor will be selected. System access information is stored at a cache of a local core in response to a cache line being filled. The cached system access information is merged with local access information, wherein the most-restrictive access is selected.