Cache Memory Segmentation for Image Processing Efficiency
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Solution Overview
Problem
Conventional image processing apparatuses face efficiency degradation due to the need for multiple cache accesses when using single-port SRAM, and increased costs with multi-port SRAM, as they struggle to efficiently retrieve pixel values for image processing.
Innovation Solution
An image processing apparatus with a cache memory system that optimizes cache access by transferring and storing pixel values in multiple cache blocks, allowing for simultaneous retrieval of necessary pixel values through coordinated cache line management and memory controller operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single-port SRAM is used for cache memory, then the read rate is high and cost is low, but multiple cache accesses are required to read pixel values from different cache lines, degrading processing efficiency
Solution Approach 1:
The cache memory is divided into multiple cache blocks (first cache block, second cache block, etc.), each capable of independent access. This segmentation allows simultaneous reading of pixel values from different cache lines through different cache blocks, eliminating the need for multiple sequential accesses while maintaining the advantages of single-port SRAM.
2Loss of time
If a multi-port SRAM is used for cache memory, then all pixel values can be read out by one-time cache access, but the read rate is slower and operating frequency is lowered, degrading processing efficiency
Solution Approach 1:
Instead of using a multi-port SRAM which slows down the read rate, the patent segments the cache memory into multiple cache blocks that can be accessed simultaneously. This approach achieves one-time access to all required pixel values while maintaining the high read rate of single-port SRAM, thus avoiding the frequency reduction problem.
3Loss of time
If a multi-port SRAM is used for cache memory, then all pixel values can be read out by one-time cache access, but the cost of SRAM increases according to the number of ports
Solution Approach 1:
The patent divides the cache memory into multiple cache blocks within a single-port SRAM structure. This segmentation enables simultaneous access to multiple cache lines without requiring multiple ports, thereby achieving one-time access to all necessary pixel values while avoiding the increased cost associated with multi-port SRAM.
4Quantity of substance
If multiple cache accesses are performed to read pixel values, then all necessary pixel values can be retrieved, but the processing efficiency is degraded
Solution Approach 1:
By segmenting the cache memory into multiple independently accessible cache blocks, the system can retrieve multiple pixel values from different cache lines simultaneously in a single access operation, eliminating the need for multiple sequential accesses and thereby maintaining high processing efficiency.
Data Source
AI summary
According to one embodiment, an image processing apparatus connectable to a main memory in which a plurality of pixel values of unconverted image is stored and a cache memory including a plurality of cache blocks. The apparatus includes a counter, a coordinate determination module, a memory controller, a cache access module, a pixel value calculator, and an output module. The counter determines a coordinate within converted image according to a predetermined execution sequence. The coordinate determination module determines a plurality of coordinates within unconverted image of the pixel values of unconverted image necessary to calculate a pixel value of converted image corresponding to the coordinate within converted image. The memory controller transfers the pixel values of unconverted image stored in the main memory to the cache blocks corresponding to each of the coordinates within unconverted image. The cache access module reads out all the pixel values of unconverted image necessary to calculate the pixel value of converted image from the cache blocks. The pixel value calculator calculates the pixel value of converted image by referring to the pixel values of unconverted image read out by the cache access module. The output module outputs the pixel value of converted image.