Cache Memory Request Tracing for Faster Program Flow Reconstruction
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Solution Overview
Problem
Debugging software programs on computer systems is hindered by the delay in cache memory operations, which obscure the program flow and require excessive time to reconstruct accurate execution traces, especially when cache misses occur.
Innovation Solution
A trace control circuit monitors memory requests between processor circuits and cache memory, selects specific requests using arbitration, and records information in a trace buffer, copying data enroute to reduce delays and facilitate accurate program flow reconstruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If cache memory operations are used to store data, then data access speed is improved, but the delay in cache memory operations obscures program flow and increases reconstruction time
Solution Approach 1:
The trace control circuit captures and stores cache memory data in advance (before the debugging process), so that when debugging is needed, the data is already available for immediate analysis. This preliminary capture action eliminates the delay of reconstructing program flow during debugging, as the trace buffer already contains the cached data needed for analysis.
2Loss of information
If all memory requests are traced, then complete program flow information is obtained, but the complexity and time required to process the data increases
Solution Approach 1:
The arbitration algorithm extracts and selects only the relevant memory requests from the complete set of memory requests, storing them in the trace buffer. This selective extraction reduces the volume of data that needs to be processed during debugging, thereby reducing complexity while still capturing sufficient information to reconstruct program flow accurately.
Solution Approach 2:
Instead of tracing every single memory request (excessive action), the system uses arbitration to select a representative subset of memory requests (partial action) that are sufficient for program flow reconstruction. This partial tracing approach reduces processing complexity while maintaining adequate debugging information.
3Measurement precision
If cache fill data is copied enroute to cache memory, then trace accuracy is improved, but the use of energy and processing resources increases
Solution Approach 1:
The trace control circuit copies cache fill data enroute (in advance) to the trace buffer before the data reaches cache memory. This preliminary copying action ensures that accurate trace data is captured without requiring additional energy-intensive reading operations during the debugging process, as the data is already in the trace buffer when needed.
Data Source
AI summary
An apparatus includes a plurality of processor circuits, a cache memory circuit, and a trace control circuit. The trace control circuit may be configured, in response to activation of a mode to record information indicative of program execution of at least one processor circuit of the plurality of processor circuits, to monitor memory requests transmitted between ones of the plurality of processor circuits and the cache memory circuit, and then to select a particular memory request of monitored memory requests using an arbitration algorithm. The trace control circuit may be further configured to allocate space in a trace buffer to the particular memory request, and to store, in the trace buffer, information associated with the particular memory request.