Cache Memory Wear Leveling via Data Exchange Refresh

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Solution Overview

Problem

Cache memory systems face challenges in maintaining data durability and stability due to uneven write frequency across memory areas, leading to potential data loss and reduced lifespan, especially when using lower durability memory types like SRAM or eDRAM.

Innovation Solution

The implementation of a cache memory system with a refresh control unit that executes wear leveling by exchanging data between areas based on write frequency information, ensuring balanced write counts and utilizing a cache controller to manage data consistency and coherency across multiple levels of cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If lower durability memory types like SRAM or eDRAM are used to accelerate CPU processing, then processing speed is improved, but data durability and stability deteriorate due to uneven write frequency across memory areas

Engineering Contradiction:
Improveprocessing speedVSAvoiddata durability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The refresh control unit proactively executes wear leveling operations before data loss occurs by monitoring write frequency and exchanging data between memory areas. This preliminary action prevents the deterioration of data durability while maintaining the use of fast but less durable memory types like SRAM or eDRAM for cache memory.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If data is frequently written to accelerate processing, then productivity is improved, but write deviations between memory areas increase, reducing lifespan

Engineering Contradiction:
Improveprocessing throughputVSAvoidmemory lifespan
Core Design Contradiction:
ProductivityVSDuration of action of stationary object

Solution Approach 1:

The refresh control unit monitors write frequency information from the cache memory and uses this feedback to dynamically exchange data between memory areas. This feedback mechanism ensures that areas with high write frequency have their data relocated to areas with lower write frequency, balancing the wear across all memory areas and extending overall memory lifespan while maintaining high processing throughput.

Inventive Principle:
Principle #23Feedback

3Duration of action of stationary object

If wear leveling is implemented by exchanging data between memory areas, then memory lifespan is extended, but system complexity increases due to additional control mechanisms

Engineering Contradiction:
Improvememory lifespanVSAvoidcontrol mechanism complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The refresh control unit automatically executes wear leveling operations by monitoring write frequency and exchanging data between memory areas without requiring external intervention or complex external control systems. This self-service approach extends memory lifespan while minimizing the increase in system complexity by integrating the wear leveling function within the existing refresh control infrastructure.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11615030B2Cache memory system and cache memory control method
Publication Date: 2023.03.28 KIOXIA CORP
  • US11615030B2 patent drawing
  • US11615030B2 patent drawing
  • US11615030B2 patent drawing

AI summary

According to one embodiment, a cache memory system includes a cache memory and a cache controller. The cache memory can store first data to be read or written by a processor. The cache controller is configured to execute a refresh. The refresh includes reading the first data stored in the cache memory and writing the read first data to the cache memory. When executing the refresh, the cache controller is configured to exchange the first data stored in a first area of the cache memory for second data stored in a second area of the cache memory.