Storage Command Retry Signaling for Cache-Miss Latency

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing storage devices experience performance degradation due to varying latencies in accessing different storage media, leading to CPU stalls and inefficient data command processing, especially when cache misses occur.

Innovation Solution

Implementing a storage device with a fast and slow storage medium, along with a response engine that issues a retry message based on estimated latency, allowing the host CPU to manage command buffers more efficiently by removing pending commands and scheduling retries, thereby reducing CPU stalls.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is stored in slow storage medium (e.g., non-volatile memory), then storage capacity is improved, but access latency increases causing CPU stalls

Engineering Contradiction:
Improvestorage capacityVSAvoidaccess latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The storage device is segmented into two distinct storage mediums: a first storage medium (fast, volatile memory) and a second storage medium (slow, non-volatile memory). Each medium serves specific purposes - the fast medium handles active data access to minimize latency, while the slow medium provides bulk storage capacity. This segmentation allows the system to achieve both high capacity and low latency by directing operations to appropriate mediums.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first storage medium (fast volatile memory) acts as an intermediary between the CPU and the second storage medium (slow non-volatile memory). When the CPU needs data, it first checks the fast medium; if not present, the system retrieves from slow medium and pre-loads into fast medium. This intermediary layer buffers the latency difference, preventing CPU stalls while maintaining access to large capacity storage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If CPU waits for storage device response, then data accuracy is ensured, but CPU utilization decreases causing performance degradation

Engineering Contradiction:
Improvedata accuracyVSAvoidCPU utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary actions by pre-loading data from the slow storage medium into the fast storage medium before the CPU actually needs it. When data is accessed in the fast medium, the system anticipates future needs and pre-loads related data. This eliminates CPU waiting time while ensuring data accuracy, as all data transfers are completed and verified before CPU access.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms where the storage device provides status messages and latency information back to the CPU. Based on this feedback, the CPU can adjust its command buffer management and retry strategies. This allows the CPU to maintain high utilization by making informed decisions about when to issue commands and when to retry, without compromising data accuracy.

Inventive Principle:
Principle #23Feedback

3Productivity

If command buffer is filled with pending commands, then throughput is improved, but saturation risk increases causing performance degradation

Engineering Contradiction:
ImprovethroughputVSAvoidcommand buffer saturation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The storage device provides feedback messages to the CPU about command buffer status, processing latency, and saturation risk. Based on this feedback, the CPU dynamically adjusts the rate at which it fills the command buffer, preventing saturation while maintaining high throughput. The feedback loop enables the system to optimize buffer utilization without risking performance degradation from saturation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4697154A1Systems and methods for data command processing
Publication Date: 2026.02.18 SAMSUNG ELECTRONICS CO LTD
  • EP4697154A1 patent drawingFigure 1
  • EP4697154A1 patent drawingFigure 2
  • EP4697154A1 patent drawingFigure 3

AI summary

Systems and methods for data command processing are disclosed. A storage device includes a first storage medium (122), a second storage medium (124), and a processor (120). The processor (120) may be configured to: receive from a computing device (100) a first command associated with first data; search the first storage medium (122) for processing the first command; and based on the search of the first storage medium (122), transmit a message to the computing device (100). Based on a transmission of the message, the storage device may be configured to receive a second command associated with the first data from the computing device (100).