Cache Page Segmentation for Parallel Access Control
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Solution Overview
Problem
The existing storage control apparatuses face a challenge in managing cache memory efficiently, leading to reduced parallel processing due to the need for exclusive access to exclusion resources, which limits the speed of data access and increases waiting times for sub-processing units.
Innovation Solution
The proposed solution involves dividing the storage area into multiple storage resources, each with a corresponding link and exclusion resource, allowing multiple sub-processing units to allocate and access resources in parallel using LRU algorithms to manage cache pages, thereby reducing waiting times and enhancing parallel processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single link is used to manage cache memory pages, then consistency of operation result is maintained, but the degree of parallel processing is lowered and waiting time increases
Solution Approach 1:
The patent divides the cache memory management into multiple independent links (first link, second link, etc.), where each link manages a separate set of cache pages. This segmentation allows multiple sub-processing units to operate on different links simultaneously without requiring exclusive access to a single link, thereby enabling parallel processing while maintaining consistency within each link through its own exclusion resource.
2Device complexity
If a single link is used to manage cache memory pages, then data structure simplicity is maintained, but waiting time for exclusion resource acquisition increases
Solution Approach 1:
The patent creates multiple links (first link, second link, etc.) to manage different sets of cache pages. Each link has its own exclusion resource, allowing sub-processing units to acquire different exclusion resources simultaneously. This reduces waiting time because multiple exclusion resources are available in parallel, while each individual link maintains relatively simple data structure operations.
3Productivity
If multiple sub-processing units access the same link simultaneously, then parallel processing capability is improved, but consistency of operation result deteriorates
Solution Approach 1:
The patent segments the cache management into multiple independent links, where each link is associated with a specific sub-processing unit and has its own exclusion resource. This ensures that when multiple sub-processing units access different links simultaneously, each link's operation consistency is maintained through its dedicated exclusion resource, while parallel processing capability is improved by the multiplicity of links.
Solution Approach 2:
Each link is designed with local quality characteristics, having its own exclusion resource and managing its own set of cache pages. This local independence ensures that operations on one link do not interfere with operations on other links, allowing parallel access while maintaining local consistency within each link.
Data Source
AI summary
A memory includes a plurality of pages used as a cache area. A processor allocates a first storage resource to a first link indicating a first page group of the plurality of pages, and a second storage resource to a second link indicating a second page group of the plurality of pages. The processor uses the first and the second links, and processes access requests for accessing to the first and the second storage resources, in parallel.