Cache-Based Parameter Copying for Hot Standby Memory Coherence
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Solution Overview
Problem
The existing parameter copying process in hot standby systems is time-consuming, imposing a heavy burden on the MPU and causing system downtime, as it requires copying data bit by bit, which takes around 15 minutes to complete, and is vulnerable to interruptions.
Innovation Solution
A parameter copying method that involves cache reading and writing data in block writes using a high-speed serial bus, allowing simultaneous block writes to both main memories, reducing the process time and ensuring cache coherency between the main memories.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is copied bit by bit using the existing parameter copying process, then the main memory images on both sides can coincide, but the APC process time becomes very long (about 15 minutes) and the MPU is heavily burdened
Solution Approach 1:
The patent uses cache memory as an intermediate copying buffer to store data blocks from the control side main memory before transferring them to the standby side. This block-based copying approach replaces the traditional bit-by-bit copying, significantly reducing the APC process time while ensuring complete and accurate data transfer between main memories.
Solution Approach 2:
Cache memory serves as an intermediary component between the control side main memory and standby side main memory. The cache reads data in blocks from the control side, holds it temporarily, and then writes it to the standby side in block writes. This intermediary approach enables efficient data transfer without directly burdening the MPU with bit-by-bit copying operations.
2Ease of operation
If data is copied bit by bit to reduce MPU load, then the MPU burden is suppressed, but the APC process time becomes very long (about 15 minutes)
Solution Approach 1:
The patent implements block-based copying where the cache memory reads and writes data in blocks rather than bit by bit. This approach maintains ease of operation by offloading the copying task from the MPU to the cache hardware, while simultaneously reducing APC time through efficient block transfer operations that can be executed in parallel.
Solution Approach 2:
The cache memory performs the data copying operation autonomously without requiring continuous MPU intervention. The cache reads blocks from control side main memory and writes them to standby side main memory automatically, making the copying process self-service and freeing the MPU from the burden of bit-by-bit copying while achieving fast transfer.
3Reliability
If APC is executed for a long time, then complete parameter copying is achieved, but the system operates in single operation state and is vulnerable to interruptions
Solution Approach 1:
The patent uses block-based copying through cache memory to complete the APC process much faster than traditional bit-by-bit methods. This reduces the time the system spends in single operation state, minimizing the window of vulnerability to interruptions while ensuring complete parameter copying through systematic block transfer of all main memory data.
Data Source
AI summary
A parameter copying method is applied to a duplex system in which MPU and a main memory are duplicated and duplex operations on a hot standby system are performed. The parameter copying method includes cache reading data in the main memory corresponding to one MPU, cache writing the data read in the cache reading step on an as-is basis, and writing the data into the main memory corresponding to the one MPU by a block write that is produced by a cache replace caused due to the cache writing step, and also writing the same data into the main memory corresponding to the other MPU by the block write on a basis of a mirrored write.