Cache Partitioning for Dynamic Lockstep Mode Switching
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Solution Overview
Problem
Existing multiprocessor data processing systems face challenges in dynamically transitioning between lockstep and non-lockstep execution modes due to cache state synchronization issues, leading to high overhead and inefficiencies, particularly in maintaining identical caching states across processors.
Innovation Solution
The system partitions the cache into lockstep and non-lockstep modes, where a subset of cache ways is reserved for lockstep mode and the remaining for non-lockstep mode, with specific handling of cache hits and misses to maintain coherence and allow for dynamic transitions between modes without flushing or invalidating cache contents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant processors are provided for lockstep execution to achieve reliability, then reliability is improved, but cost increases
Solution Approach 1:
The cache system dynamically switches between lockstep and non-lockstep modes based on operational requirements. The cache controller detects the execution mode and configures cache ways accordingly, allowing the system to have redundancy only when needed, thus reducing overall cost while maintaining reliability when required.
Solution Approach 2:
The cache structure serves multiple functions by supporting both lockstep and non-lockstep execution modes. The same cache hardware is used for both redundant processing and performance-critical operations, eliminating the need for separate cache structures for each mode and reducing overall system cost.
2Reliability
If lockstep execution mode is used to ensure safety integrity, then reliability is improved, but processing throughput deteriorates
Solution Approach 1:
The system dynamically transitions between lockstep and non-lockstep execution modes based on the criticality of the current task. Non-critical tasks execute in non-lockstep mode for high throughput, while critical tasks switch to lockstep mode for safety integrity, optimizing overall system productivity.
Solution Approach 2:
The cache is segmented into dedicated lockstep ways and non-lockstep ways. This segmentation allows independent optimization of each mode - lockstep ways maintain strict coherence for safety-critical operations while non-lockstep ways provide high-performance caching for throughput-critical operations, resolving the throughput penalty.
3Stability of the object's composition
If cache contents are flushed or invalidated during mode transitions to maintain coherence, then cache coherence is improved, but processing time increases
Solution Approach 1:
The cache controller preliminarily configures the cache structure according to the execution mode before actual processing begins. By pre-establishing the appropriate cache configuration (lockstep or non-lockstep), the system avoids the time-consuming flush and invalidate operations that would otherwise be required during mode transitions.
Solution Approach 2:
The cache configuration dynamically adapts to the execution mode through controller-directed way allocation rather than through data flushing. This dynamic reconfiguration maintains cache coherence by directing accesses to the appropriate cache ways for each mode, eliminating the time loss associated with invalidating and refilling cache contents during transitions.
4Stability of the object's composition
If dedicated cache ways are reserved for lockstep mode to maintain coherence, then cache coherence is improved, but cache utilization deteriorates
Solution Approach 1:
Cache way allocation is dynamically adjusted based on the current execution mode. When in non-lockstep mode, more cache ways are made available for high-performance caching, maximizing utilization. When transitioning to lockstep mode, the controller reconfigures the same ways for lockstep coherence requirements, ensuring both coherence and optimal utilization at different times.
Solution Approach 2:
The same cache ways serve both lockstep and non-lockstep functions through dynamic allocation. Rather than having dedicated ways that would reduce overall utilization, the cache structure is multi-functional, with ways being assigned to different modes based on current operational requirements, thus maintaining high utilization while ensuring coherence when needed.
Data Source
AI summary
Cache storage may be partitioned in a manner that dedicates a first portion of the cache to lockstep mode execution, while providing a second (or remaining) portion for non-lockstep execution mode(s). For example, in embodiments that employ cache storage organized as a set associative cache, partition may be achieved by reserving a subset of the ways in the cache for use when operating in lockstep mode. Some or all of the remaining ways are available for use when operating in non-lockstep execution mode(s). In some embodiments, a subset of the cache sets, rather than cache ways, may be reserved in a like manner, though for concreteness, much of the description that follows emphasizes way-partitioned embodiments.