Processor Cache Proximity Tags for I/O Latency
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Solution Overview
Problem
Current information handling systems do not effectively account for Input/Output (I/O) read latency in processor caching algorithms, leading to inefficiencies in data retrieval and storage processes.
Innovation Solution
Incorporating a cache memory with proximity tags in processors, where data is fetched, stored, and evicted based on proximity information to optimize cache usage and reduce latency by prioritizing retention of data from more remote locations and evicting data from proximate locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is cached from proximate locations, then cache hit rate is improved, but I/O read latency increases due to retaining slow-to-access data
Solution Approach 1:
The patent applies local quality by associating each cache line with a proximity tag that identifies the I/O device location (proximate or remote). This allows different cache lines to have different retention characteristics based on their specific proximity properties, enabling selective eviction of proximate data while retaining remote data that would otherwise be slow to access.
Solution Approach 2:
The cache eviction policy is made dynamic by continuously monitoring proximity tags and adjusting eviction decisions based on current cache state and proximity information. The system dynamically adapts which data to retain or evict based on real-time proximity assessments, rather than using a static eviction policy.
2Reliability
If cache size is increased to retain more data, then cache performance is improved, but system complexity increases
Solution Approach 1:
The system performs preliminary action by determining and storing proximity information for each cache line at the time of data insertion. This pre-computed proximity data is stored in proximity tags, eliminating the need for complex real-time analysis of data access patterns or I/O device locations during cache operations.
Solution Approach 2:
Each cache line essentially serves itself by carrying its own proximity tag information. The proximity tag acts as self-descriptive metadata that enables the cache controller to make informed eviction decisions without requiring external analysis or complex system-wide tracking of I/O device characteristics.
Data Source
AI summary
A processor includes a cache memory and a cache controller. The cache controller fetches first data from a first location of an information handling system, stores the first data to a first cache line of a plurality of cache lines, determines first proximity information for the first data based upon the first location, stores the first proximity information in a first proximity tag associated with the first cache line, and evicts the first cache line from the cache based upon the first proximity tag.