Cache Purge Simulation via Partitioned Skip Switch

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Solution Overview

Problem

Traditional cache purge simulations in high-performance information handling systems are time-consuming due to ever-growing cache sizes, requiring millions of simulation cycles to complete, and often involve unnecessary purging of entire caches, which can be inefficient.

Innovation Solution

A cache purge simulation system that utilizes a cache skip switch with a configurable state register to selectively purge only a physical partition of the cache, reducing the number of storage locations to be purged and allowing for faster simulation by enabling a purge of a subset of the cache rather than the entire cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire cache is purged during simulation, then verification completeness is improved, but simulation time increases significantly

Engineering Contradiction:
Improveverification completenessVSAvoidsimulation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The cache is divided into multiple partitions, and the purge operation is applied selectively to only the relevant partition identified by the cache skip switch, rather than purging the entire cache. This segmentation allows verification to focus on the specific cache region that needs testing, reducing unnecessary operations on other partitions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of performing a complete cache purge, the system performs a partial purge limited to the specific partition designated by the cache skip switch. This partial action is sufficient for verification purposes while avoiding the time cost of purging the entire cache.

Inventive Principle:
Principle #16Partial or excessive action

2Productivity

If cache size increases to maintain performance, then system performance is improved, but verification complexity increases

Engineering Contradiction:
Improvesystem performanceVSAvoidverification complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The cache structure is segmented into multiple partitions, allowing the verification system to target specific partitions rather than the entire cache. This reduces verification complexity even as overall cache size grows, since the skip switch enables selective access to individual partitions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cache skip switch acts as an intermediary between the verification system and the cache partitions. It simplifies the verification process by providing a direct mechanism to select and access specific partitions, eliminating the need for complex address calculation and range validation logic in the verification system.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11860789B2Reduced simulation verification complexity of cache purge
Publication Date: 2024.01.02 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11860789B2 patent drawing
  • US11860789B2 patent drawing
  • US11860789B2 patent drawing

AI summary

A cache purge simulation system includes a device under test with a cache skip switch. A first cache skip switch includes a configurable state register to indicate whether all of an associated cache is purged upon receipt of a cache purge instruction from a verification system or whether a physical partition that is smaller than the associated cache is purged upon receipt of the cache purge instruction from the verification system. A second cache skip switch includes a configurable start address register comprising a start address that indicates a beginning storage location of a physical partition of an associated cache and a configurable stop address register comprising a stop address that indicates a ending storage location of the physical partition of the associated cache.