Cache Replacement Loop-Back Circuit for Global Bus Burden Reduction
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Solution Overview
Problem
In multiprocessor systems, cache replacement requests heavily burden the global bus, leading to reduced capability to handle other requests and potential unnecessary Eviction if not managed properly.
Innovation Solution
Implementing a cache replacement request loop-back circuit within each system board to handle cache replacement requests locally instead of sending them to the address crossbar board, thereby reducing global bus burden and preventing unnecessary Eviction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If cache replacement requests are sent through the global bus to the address crossbar board, then cache replacement can be performed across system boards, but the global bus becomes heavily burdened and the capability to handle other requests is reduced
Solution Approach 1:
The patent segments cache replacement requests into two categories: local requests handled within the same system board, and remote requests requiring global bus transmission. By introducing a local replacement circuit that can handle cache replacements within the same system board without involving the global bus, the patent divides the request handling responsibility between local and global levels, thereby reducing global bus burden while maintaining cache replacement functionality.
Solution Approach 2:
The patent introduces a local replacement circuit as an intermediary component within each system board that can handle cache replacement requests locally before they reach the global bus. This intermediary handles the majority of replacement requests that don't require cross-board coordination, acting as a filter that prevents unnecessary global bus traffic while still allowing remote replacements when needed.
2Reliability
If cache replacement requests are handled through the global bus, then system-wide cache coherence can be maintained, but unnecessary Eviction may occur and system performance is reduced
Solution Approach 1:
The patent implements preliminary action by having the local replacement circuit evaluate and handle cache replacement requests within the same system board before they are transmitted over the global bus. This preliminary local handling prevents unnecessary global bus traffic and potential unnecessary Eviction operations, while still maintaining cache coherence through selective use of the global bus only when cross-board cache coherence is required.
3Ease of operation
If all requests are routed through the address crossbar board, then centralized arbitration can be performed, but the capability to handle other requests is reduced due to global bus burden
Solution Approach 1:
The patent segments the arbitration function into two levels: local arbitration within each system board for local cache replacement requests, and global arbitration through the address crossbar board for remote requests. This segmentation allows the majority of requests to be arbitrated locally without burdening the global bus, while the address crossbar board maintains centralized arbitration capability for requests that require cross-board coordination.
Solution Approach 2:
The local replacement circuit acts as an intermediary that filters and handles local cache replacement requests before they reach the global arbitration system. This intermediary prevents unnecessary traffic from reaching the address crossbar board, thereby improving overall request handling capability while the centralized arbitration system remains available for remote requests.
Data Source
AI summary
A request issued by the CPU is output from the local arbiter by way of the CPU bus and the CPU-issued request queue. The cache replacement request loop-back circuit determines at the loop-back determination circuit whether the outputted request is a cache replacement request or not. A request other than a cache replacement request is output onto the local bus. A cache replacement request is output to the selector and sent to the request handling section when there is no valid request on the global bus.