Cache Replacement Policy Using Retention Priority Values

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Solution Overview

Problem

Current cache replacement policies in data processing systems do not effectively differentiate between memory access requests from various sources and privilege levels, leading to inefficient cache management and potential delays in data access.

Innovation Solution

Assigning retention priority values to cache lines based on the source of memory access requests and privilege levels, allowing the cache control circuitry to evict cache lines with lower priority values first, thereby optimizing cache retention and reducing access delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional cache replacement policies (LRU, round robin, random) are used, then cache management is simple, but cache performance is suboptimal due to inability to differentiate between different memory access sources and privilege levels

Engineering Contradiction:
Improvecache performanceVSAvoidcache control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by assigning different retention priority values to cache lines based on their specific characteristics - the source of the memory access request and the privilege level. This creates localized differentiation within the cache system, where each cache line is treated according to its specific origin and importance, rather than applying a uniform replacement policy to all cache lines.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of cache line identification by introducing retention priority values that encode information about the memory access source and privilege level. This parameter change enables the cache control circuitry to make more informed replacement decisions, transforming the cache management from a simple uniform approach to a differentiated approach based on these new parameters.

Inventive Principle:
Principle #35Parameter changes

2Speed

If cache lines are retained based on frequent access patterns, then data access speed improves, but cache eviction decisions become more complex

Engineering Contradiction:
Improvedata access speedVSAvoideviction policy complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing retention priority values in the cache control circuitry based on the source and privilege level of memory access requests. This preliminary classification is performed when cache lines are inserted, so that subsequent eviction decisions can be made quickly by simply comparing pre-assigned priority values, rather than analyzing access patterns in real-time.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If cache memory size is increased to reduce evictions, then cache hit rate improves, but system cost and power consumption increase

Engineering Contradiction:
Improvecache hit rateVSAvoidcache memory size
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent changes the parameter of cache line identification by introducing retention priority values that encode information about the memory access source and privilege level. This parameter change enables the cache control circuitry to make more informed replacement decisions, transforming the cache management from a simple uniform approach to a differentiated approach based on these new parameters.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9372811B2Retention priority based cache replacement policy
Publication Date: 2016.06.21 ARM LTD
  • US9372811B2 patent drawing
  • US9372811B2 patent drawing
  • US9372811B2 patent drawing

AI summary

A data processing system includes a cache memory 58 and cache control circuitry 56 for applying a cache replacement policy based upon a retention priority value PV stored with each cache line 66 within the cache memory 58. The initial retention priority value set upon inserting a cache line 66 into the cache memory 58 is dependent upon either or both of which of a plurality of sources issued the access memory request that resulted in the insertion or the privilege level of the memory access request resulting in the insertion. The initial retention priority level of cache lines resulting from instruction fetches may be set differently from cache lines resulting from data accesses.