Cache Resident Processor Testing Method
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Solution Overview
Problem
Current processor testing methods are time-consuming and require expensive equipment, as they often test only a portion of the possible functions of electronic circuits, and disabling units can complicate functional testing due to altered signaling.
Innovation Solution
Implementing cache resident testing by loading a test program into a processor's cache, redirecting memory requests to the cache, and determining if results match expected outcomes, allowing for efficient testing of processor units without the need for extensive functional testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If functional tests are performed on electronic circuits, then the reliability of testing is improved, but the testing time and cost increase significantly
Solution Approach 1:
The patent segments the testing process by dividing electronic circuits into functional units and testing them independently through cache resident testing. Each functional unit can be tested separately by loading test programs into its associated cache, allowing parallel testing and reducing overall testing time while maintaining comprehensive coverage of circuit functionality.
Solution Approach 2:
The patent uses cache memory as an intermediary to perform testing. Instead of directly testing functional units with external test equipment, the cache serves as a mediator that can load test programs and data, execute them through the functional units, and capture results. This intermediary approach eliminates the need for expensive external testing equipment and reduces testing time significantly.
2Manufacturing precision
If all possible functions of electronic circuits are tested, then the manufacturing precision is improved, but the device complexity increases
Solution Approach 1:
The patent makes the cache memory universal by enabling it to serve multiple functions: normal operation during processing and testing environment during testing. The same cache structure is used for both data caching and test program execution, eliminating the need for separate dedicated test equipment and reducing overall system complexity while maintaining comprehensive testing capability.
Solution Approach 2:
The patent implements self-service testing where the processor's own cache and functional units are used to test themselves. Test programs are loaded into the cache and executed by the processor's own functional units, allowing the system to perform comprehensive self-diagnosis without external testing equipment. This self-service approach reduces device complexity while maintaining complete testing coverage.
3Productivity
If units are disabled to find usable portions, then the productivity is improved, but the ease of operation deteriorates due to altered signaling
Solution Approach 1:
The patent applies preliminary action by performing comprehensive testing on all functional units before any are disabled. Test programs are executed on all units initially to identify which ones are defective. Only after this preliminary identification are non-functional units disabled. This approach maintains original signaling characteristics during testing and simplifies the process of determining which units can be used, improving both productivity and ease of operation.
Data Source
AI summary
Apparatuses, computer readable mediums, and methods of processor unit testing using cache resident testing are disclosed. The method may include loading a test program in a cache on a chip comprising one or more processor units. The method may include the one or more processor units executing the test program to generate one or more results. The method may include redirecting a first memory reference to the cache, wherein the first memory reference is generated during the execution of the test program. The method may include determining whether the one or more generated results match one or more test results. The method may include redirecting a memory request to a memory location resident in the cache if the memory request includes a memory location not resident in the cache. The method may include redirecting a memory request to the cache if the memory request is not directed to the cache.