Cache Management Using Per Memory Region Reuse Distance

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Solution Overview

Problem

Existing cache management techniques struggle to effectively predict when memory access requests will be satisfied by the cache, leading to inefficiencies in data retrieval and increased latency due to cache misses.

Innovation Solution

The proposed solution involves maintaining a memory request issue counter (MRIC) and a region reuse distance table (RRDT) to calculate and update region reuse distances for memory regions. These reuse distances are used to intelligently manage the cache by predicting when memory access requests will be satisfied, thereby optimizing cache allocation and replacement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional cache management techniques are used, then cache structure is simple, but cache performance is poor due to inability to predict data availability

Engineering Contradiction:
Improvecache performanceVSAvoidcache management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent calculates reuse distance in advance for each memory access request, predicting when data will be needed again. This preliminary prediction allows the cache manager to make informed decisions about keeping data in cache versus evicting it, improving cache performance without requiring complex real-time analysis during data access.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where reuse distance information is continuously updated and fed back into the cache management decision process. The reuse distance is calculated based on actual access patterns and used to adjust cache replacement policies dynamically, allowing the system to learn from past access behavior to improve future cache management.

Inventive Principle:
Principle #23Feedback

2Reliability

If more data is stored in cache to improve data availability, then cache hit rate increases, but cache capacity is exceeded leading to more evictions

Engineering Contradiction:
Improvedata availabilityVSAvoidcache capacity utilization
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies different cache management strategies to different data based on their reuse distance characteristics. Data with short reuse distance (likely to be accessed soon) is prioritized for cache retention, while data with long reuse distance is more readily evicted. This local differentiation allows efficient use of limited cache capacity focused on the most valuable data.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter used for cache replacement decisions from conventional metrics like LRU (least recently used) to reuse distance-based metrics. By using reuse distance as the key parameter for cache management decisions, the system can make more intelligent capacity utilization choices that prioritize data likely to be accessed soon over data that will not be accessed for a long time.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If cache replacement decisions are made based on recent usage alone, then implementation is simple, but data with longer but still relevant access patterns is incorrectly evicted

Engineering Contradiction:
Improveimplementation simplicityVSAvoidcache replacement accuracy
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent calculates reuse distance in advance based on the current access pattern and historical data, providing a predictive metric before replacement decisions are made. This preliminary calculation allows the system to look beyond immediate recent usage and consider longer-term access patterns, improving replacement accuracy without requiring complex real-time analysis during the actual replacement event.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12339783B2Managing a cache using per memory region reuse distance estimation
Publication Date: 2025.06.24 ADVANCED MICRO DEVICES INC
  • US12339783B2 patent drawing
  • US12339783B2 patent drawing
  • US12339783B2 patent drawing

AI summary

A memory request issue counter (MRIC) is maintained that is incremented for every memory access a central processing unit core makes. A region reuse distance table is also maintained that includes multiple entries each of which stores the region reuse distance for a corresponding region. When a memory access request for a physical address is received, a reuse distance for the physical address is calculated. This reuse distance is the difference between the current MRIC value and a previous MRIC value for the physical address. The previous MRIC value for the physical address is the MRIC value the MRIC had when a memory access request for the physical address was last received. A region reuse distance for a region that includes the physical address is generated based on the reuse distance for the physical address and used to manage the cache.