Cache Scrubber Circuit for Contention-Based Attack Resistance
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Solution Overview
Problem
Existing cache randomization techniques face challenges such as high implementation cost, power consumption, and impractical overhead due to the need for software management of randomization tables, limited scalability, and significant performance loss from noise injection and frequent re-keying intervals.
Innovation Solution
The implementation of a cache scrubber circuit that enhances side-channel security and performance by repeatedly walking through all cache sets and evicting lines when the set's occupancy exceeds a given threshold, thereby increasing re-keying intervals while maintaining protection against contention-based cache attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cache-set randomization is implemented to resist contention-based cache attacks, then security is improved, but performance is degraded due to frequent re-keying intervals and noise injection
Solution Approach 1:
The cache scrubber circuit proactively invalidates cache lines before they can be exploited by attacks. By continuously monitoring cache set occupancy and pre-invalidating lines when thresholds are exceeded, the system maintains security without requiring frequent re-keying, thus avoiding performance degradation while preserving security.
2Reliability
If re-keying intervals are shortened to increase security against cache attacks, then security is improved, but performance overhead increases
Solution Approach 1:
The cache scrubber circuit autonomously monitors cache set occupancy and invalidates lines based on configured thresholds without requiring external intervention or re-keying operations. This self-managing mechanism maintains security continuously while avoiding the performance overhead associated with frequent re-keying intervals, as the scrubber operates independently of the main execution flow.
3Reliability
If noise injection is increased to protect against cache attacks, then security is improved, but performance loss increases
Solution Approach 1:
The cache scrubber circuit extracts and removes potentially vulnerable cache lines by invalidating them when occupancy exceeds thresholds. This targeted removal approach provides security protection without introducing widespread noise injection throughout the cache system, thereby maintaining security while minimizing performance loss compared to blanket noise injection methods.
Data Source
AI summary
Techniques for cache scrubbing for cache-set randomization to resist contention-based cache attacks are described. In certain examples, a system includes a memory; an execution circuit to cause a memory access request for the memory; a cache to store a plurality of sets that each include a plurality of cache lines from the memory; a cache randomizer circuit to generate a randomized index into the plurality of sets of the cache based on an address of the memory access request; and a cache scrubber circuit to determine that a number of invalid cache lines in a set of the plurality of sets of the cache is less than a threshold number of invalid cache lines, and in response, invalidate a valid cache line in the set of the plurality of sets of the cache.