Multi-Controller Storage Cache Segmentation for Error Isolation
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Solution Overview
Problem
Existing storage devices suffer from complete controller blocking when an error occurs in the cache region, leading to deteriorated data duplexing operations.
Innovation Solution
A storage device with multiple controllers, each having a cache region and management units, dynamically excludes specific management units from allocation targets in the cache region upon error detection, allowing operations to continue using remaining units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller having an error in the cache region is blocked to ensure data integrity, then reliability is improved, but productivity deteriorates due to loss of data reading/writing operations
Solution Approach 1:
The cache region is divided into multiple management units (segments), allowing the system to exclude only the specific segment containing the error while continuing to use other segments. This segmentation enables partial operation continuity, resolving the contradiction between maintaining data integrity and preserving productivity.
Solution Approach 2:
The erroneous management unit is extracted (excluded) from the allocation target set, removing only the specific faulty component while leaving the rest of the cache region operational. This extraction approach maintains reliability by isolating the error while preserving productivity through continued use of healthy segments.
2Reliability
If the controller having an error is blocked to prevent error propagation, then reliability is improved, but device complexity increases due to error handling mechanisms
Solution Approach 1:
By segmenting the cache region into manageable units with individual error tracking, the system can contain errors to specific segments without requiring complex system-wide error handling. This reduces overall device complexity while maintaining reliability.
Solution Approach 2:
Each management unit independently tracks its own error state, allowing the system to automatically identify and exclude faulty segments without requiring complex centralized error processing logic. This self-service approach simplifies the overall error handling mechanism.
3Productivity
If all management units in the cache region are used for data operations to maximize productivity, then productivity is improved, but reliability deteriorates when errors occur
Solution Approach 1:
The cache region is segmented into multiple independent management units, allowing the system to maintain high productivity by utilizing all healthy segments while limiting error impact to only the affected segment. This segmentation strategy simultaneously maximizes productivity and protects reliability.
Solution Approach 2:
The system uses more management units than a single-failure approach would require, allocating cache space aggressively while relying on the exclusion mechanism to handle errors. This partial action approach maximizes normal operation capacity while maintaining reliability through selective exclusion when needed.
Data Source
AI summary
In a storage device including a plurality of controllers for controlling data reading and writing operations with respect to at least one host computer, each of the controllers includes: a cache region to which a plurality of management units capable of temporarily storing the data are allocated in accordance with the data reading and writing operations; and a control unit for controlling the data reading and writing operations, and when an error occurs, the control unit determines whether or not an occurrence position of the error is in the cache region, and when it is determined that the occurrence position is in the cache region, the control unit excludes, among the plural management units, a specific management unit that contains the occurrence position from an allocation target in the cache region, to control the data reading and writing operations using remaining management units in the plural management units.