Cache Apparatus Using Segmented Data Arrays for Energy Reduction
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Solution Overview
Problem
Set associative caches face challenges in reducing energy consumption and latency due to wasteful parallel access of all cache ways, with existing way prediction techniques trading accuracy for latency and filter caches being inefficient for high associativity.
Innovation Solution
A cache apparatus with a data storage structure comprising two arrays, where a first data array is direct-mapped and a second data array is set-associative, using an access likelihood policy to determine which cache blocks to store in the first array for quick access, reducing energy consumption and latency by minimizing unnecessary way access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If all cache ways are accessed in parallel to reduce latency, then access speed is improved, but energy consumption increases
Solution Approach 1:
The cache data array is segmented into two separate arrays: a first data array for frequently accessed cache blocks and a second data array for other cache blocks. This segmentation allows selective access to only the first data array for likely hits, avoiding parallel access to all ways and reducing energy consumption while maintaining fast access speed for frequent data.
Solution Approach 2:
The system performs preliminary action by proactively identifying and loading frequently accessed cache blocks into the first data array before they are needed. The access likelihood policy pre-determines which blocks will be accessed soon and positions them in the optimized first data array, eliminating the need for parallel way access when these blocks are requested.
2Use of energy by moving object
If way prediction techniques are used to reduce energy consumption, then energy usage decreases, but accuracy is traded for latency
Solution Approach 1:
The cache is segmented into two data arrays with different access characteristics. The first data array is optimized for fast access to frequently used blocks, while the second data array handles other blocks. This structural segmentation eliminates the need for way prediction techniques and their associated latency trade-offs, as the system directly accesses the appropriate array based on access likelihood rather than predicting which way contains the data.
3Productivity
If a filter cache is introduced to reduce lookups, then lookup efficiency improves, but performance decreases for level one cache misses
Solution Approach 1:
The cache data array is segmented into a first data array for frequently accessed blocks and a second data array for other blocks. This segmentation inherently improves lookup efficiency for frequent data while maintaining fast miss handling, because the set associative tag storage structure can quickly determine whether a block exists in the first data array or the second data array without requiring a separate filter cache stage.
Data Source
AI summary
A cache apparatus is provided comprising a data storage structure providing N cache ways that each store data as a plurality of cache blocks. The data storage structure is organised as a plurality of sets, where each set comprises a cache block from each way, and further the data storage structure comprises a first data array and a second data array, where at least the second data array is set associative. A set associative tag storage structure stores a tag value for each cache block, with that set associative tag storage structure being shared by the first and second data arrays. Control circuitry applies an access likelihood policy to determine, for each set, a subset of the cache blocks of that set to be stored within the first data array. Access circuitry is then responsive to an access request to perform a lookup operation within an identified set of the set associative tag storage structure overlapped with an access operation to access within the first data array the subset of the cache blocks for the identified set. In the event of a hit condition being detected that identifies a cache block present in the first data array, that access request is then processed using the cache block accessed within the first data array. If instead a hit condition is detected that identifies a cache block absent in the first data array, then a further access operation is performed to access the identified cache block within a selected way of the second data array. Such a cache structure provides a high performance and energy efficient mechanism for storing cached data.