Cache System Sense Amplifier Power Control

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Solution Overview

Problem

The increasing operating frequency of processors outpaces the speed of system memory, leading to high power consumption in cache systems, particularly when using nonvolatile MRAM as cache memory, due to prolonged stabilization times of sense amplifiers during read operations.

Innovation Solution

A cache system comprising a volatile tag memory (SRAM) and a nonvolatile data memory (MRAM) with a comparison circuit and controller that turns off sense amplifiers not accessed based on comparison results, reducing unnecessary power consumption by selectively powering only required sense amplifiers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If MRAM is used as cache memory to reduce standby power consumption, then standby power consumption is reduced, but operating power consumption increases due to prolonged sense amplifier stabilization time

Engineering Contradiction:
Improvestandby power consumptionVSAvoidoperating power consumption
Core Design Contradiction:
Use of energy by stationary objectVSUse of energy by moving object

Solution Approach 1:

The cache memory is divided into two distinct parts: a volatile tag memory (SRAM) for storing tag information and a nonvolatile data memory (MRAM) for storing actual data. This segmentation allows each part to use memory technology optimized for its specific function, reducing overall power consumption while maintaining cache performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sense amplifier is controlled to operate periodically rather than continuously. The controller activates the sense amplifier only when a read operation is required, and deactivates it when not needed. This periodic operation significantly reduces power consumption during idle periods while maintaining the ability to perform read operations when data is needed.

Inventive Principle:
Principle #19Periodic action

2Reliability

If sense amplifier is kept driven to ensure stable read current in MRAM, then read reliability is improved, but power consumption increases due to extended current flow duration

Engineering Contradiction:
Improveread reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The sense amplifier transitions from a static continuously-driven state to a dynamic state where it is activated only when needed. The controller dynamically controls the sense amplifier's operation based on read requests, adjusting its activity to match actual demand and thereby reducing power consumption while maintaining read reliability when operations occur.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The operational parameters of the sense amplifier are changed from continuous operation to intermittent operation. By controlling the timing and duration of sense amplifier activation, the system maintains sufficient read current stabilization for reliable reads while dramatically reducing the total time the amplifier consumes power.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8724403B2Cache system and information-processing device
Publication Date: 2014.05.13 KIOXIA CORP
  • US8724403B2 patent drawing
  • US8724403B2 patent drawing
  • US8724403B2 patent drawing

AI summary

According to one embodiment, a cache system includes a tag memory includes a volatile memory device, the tag memory includes ways and storing a tag for each line, a data memory includes a nonvolatile memory device including sense amplifiers for reading data, the data memory includes ways and storing data for each line, a comparison circuit configured to compare a tag included in an address supplied from an external with a tag read from the tag memory, and a controller configured to turn off a power of a sense amplifier for a way which is not accessed based on a comparison result of the comparison circuit.