Cache Sequentiality Detection via Bin Occupation Tracking

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Solution Overview

Problem

Current cache management systems face inefficiencies in large main memory address spaces, struggling to keep up with real-time data read and write requests and requiring significant system resources, which hampers reliable sequentiality calculations and cache optimization.

Innovation Solution

Dividing the main memory address space into bins and using an online heuristic sequentiality detection method to assess the sequentiality of data streams, minimizing overhead and enabling real-time cache management and optimization by tracking bin occupation counts and referencing a heuristics table for sequentiality estimation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If cache management policies are implemented in real-time to improve cache memory performance, then cache memory efficiency is improved, but system resource overhead increases

Engineering Contradiction:
Improvecache memory efficiencyVSAvoidsystem resource overhead
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent segments the large address space into multiple bins, each tracked independently with occupation counts. This segmentation allows the system to manage cache policies for large address spaces without requiring proportional increases in overhead resources, as each bin requires minimal tracking state rather than full per-page metadata.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by focusing cache management efforts only on bins that exhibit sequential access patterns, rather than uniformly applying complex policies across the entire address space. The sequentiality detection mechanism identifies which bins warrant aggressive pre-fetching or promotion policies, applying resources selectively where they will have the most impact on cache efficiency.

Inventive Principle:
Principle #16Partial or excessive action

2Area of stationary object

If the address space windowed by cache memory is increased to handle larger data spaces, then cache coverage is improved, but resource requirements for maintaining overhead information increase

Engineering Contradiction:
Improveaddress space coverageVSAvoidoverhead information resources
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The patent divides the large address space into multiple bins, where each bin is represented by a single occupation count value. This segmentation enables the system to cover large address spaces (improving area) while maintaining constant or logarithmic overhead resources, since each bin requires only minimal counter storage rather than full per-page state information.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a simplified copy or abstraction of the address space structure, representing entire bins with single occupation count values rather than maintaining detailed information about each individual page. This copying approach allows large address space coverage while using minimal overhead resources to track state.

Inventive Principle:
Principle #26Copying

3Measurement precision

If sequentiality detection is performed accurately to improve cache policy generation, then cache optimization is improved, but computation time and resources increase

Engineering Contradiction:
Improvesequentiality detection accuracyVSAvoidcomputation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary action by pre-computing and storing heuristics table entries that capture sequentiality characteristics for different bin occupation patterns. When a bin is accessed, the system simply looks up the pre-computed sequentiality estimate in the heuristics table rather than performing complex real-time analysis, thereby achieving accurate sequentiality detection with minimal computation time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces the heuristics table as an intermediary between raw occupation count data and sequentiality assessment. The heuristics table pre-processes and stores sequentiality information, acting as a mediator that translates simple occupation counts into accurate sequentiality estimates without requiring complex real-time computation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11513961B2Online heuristic sequentiality detection over input/output streams for cache systems in large address spaces
Publication Date: 2022.11.29 EMC IP HLDG CO LLC
  • US11513961B2 patent drawing
  • US11513961B2 patent drawing
  • US11513961B2 patent drawing

AI summary

A method and system for assessing sequentiality of a data stream is disclosed. Specifically, the method and system disclosed herein may entail receiving an incoming request to access a page in a cache memory, wherein the page is identified by a page address of an address space in a main memory; identifying, in a memory, a bin corresponding to an address range including the page address of the page of the incoming request, wherein the bin includes k address ranges of the address space of the main memory; determining whether to update an occupation count of the bin in the memory; locating the bin in a heuristics table to obtain an estimated total number of expected proximal accesses based on an updated occupation count of the bin; and determining, based on the estimated total number of expected proximal accesses, sequentiality of the data stream to device in order to generate a policy for the cache memory.