Cache Stashing Signal Notification for Parallel Thread Latency
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Solution Overview
Problem
In parallel computing systems, the latency of delivering signal change events between program threads is significant due to polling and interrupt operations, especially as thread-level parallelism becomes more fine-grained and scaled-out.
Innovation Solution
A cache stashing-based signaling scheme is introduced, where a signal change event initiated by one program thread is stored in a cache unit and can be acquired by another program thread through specific instructions, allowing for timely and efficient notification without halting processor execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polling operation or interrupt operation is used to deliver signal change events between program threads, then signal delivery can be achieved, but additional latency is introduced
Solution Approach 1:
The patent extracts the signal value storage function into a dedicated cache stash entry within the cache unit, separating it from the main execution flow. This allows the consumer thread to quickly check for signal changes in the cache stash without initiating full polling operations or interrupt sequences, thereby reducing the time required for signal delivery while maintaining reliability.
2Productivity
If fine-grained and scaled-out thread-level parallelism is implemented, then processing capability is improved, but latency of signal delivery becomes more significant
Solution Approach 1:
The patent implements preliminary action by having the producer thread store the signal value in the cache stash entry immediately when the signal changes, before the consumer thread needs to check for it. This advance preparation eliminates waiting time and allows the consumer thread to detect signal changes instantly when it checks the cache, thus maintaining high productivity while reducing signal delivery latency in fine-grained parallelism scenarios.
3Reliability
If conventional polling operation is used for signal notification, then thread synchronization is achieved, but processor execution is halted
Solution Approach 1:
The patent introduces an intermediary mechanism - the cache stash entry - that mediates between the producer thread that changes the signal and the consumer thread that needs to detect it. The cache stash acts as a buffer that stores signal values and modification timestamps, allowing both threads to proceed with their execution without halting. The consumer thread simply reads from the cache stash to detect signal changes, maintaining synchronization while preserving processor execution flow.
Data Source
AI summary
A computer system includes a cache unit and a first processing unit. The first processing unit runs a first program thread, and performs an instruction to store information of a signal change event into the cache unit through a cache stashing operation, where the signal change event is initiated by the first program thread for alerting a second program thread.