Cache Coherency State Vectors for Multi-Protocol Interoperability

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Solution Overview

Problem

In integrated circuits, the use of different cache coherence policies and message protocols by various components makes it difficult for agents to interoperate effectively, leading to compatibility issues with interconnect fabrics.

Innovation Solution

Implementing a cache coherency state request vector that encodes permissible cache coherency states, allowing agents to specify their expected states, enabling interoperability by ensuring compliance with diverse client expectations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different cache coherence policies and message protocols are used by various components, then each component can operate with its own optimized protocol, but interoperability and compatibility among agents deteriorate

Engineering Contradiction:
Improveprotocol diversityVSAvoidinteroperability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces a message format with standardized fields (transaction type, address, mask, data, coherence state request vector) that acts as an intermediary between agents using different cache coherence policies. This standardized message structure enables agents implementing MSI, MESI, MOESI, or other protocols to communicate effectively through a common interface, resolving the interoperability problem while preserving protocol diversity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The message protocol is designed to be universal and protocol-agnostic, supporting multiple cache coherence policies (MSI, MESI, MOESI, etc.) through a single unified message format. The coherence state request vector field can encode different coherence states depending on the agent's protocol, allowing one message structure to serve multiple protocol implementations simultaneously.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a unified cache coherence protocol is implemented across all components, then interoperability is improved, but flexibility in supporting diverse cache coherence policies deteriorates

Engineering Contradiction:
ImproveinteroperabilityVSAvoidprotocol diversity
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent uses parameter changes within the message format to support different cache coherence policies. The coherence state request vector field can be configured with different bit patterns to represent various coherence states (Modified, Exclusive, Shared, Invalid, Owned, etc.) depending on which protocol the agent implements. This allows the same message structure to adapt to different protocol requirements without sacrificing interoperability.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If multiple cache coherence protocols are supported, then adaptability to heterogeneous components is improved, but message protocol complexity increases

Engineering Contradiction:
Improveprotocol compatibilityVSAvoidmessage protocol complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The message protocol is segmented into distinct functional fields: transaction type (identifying the operation), address (target location), mask (validity bits), data (payload), and coherence state request vector (protocol-specific state information). This segmentation allows each field to handle a specific aspect of the communication, simplifying the overall protocol while supporting multiple cache coherence policies through the dedicated coherence state field.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12493551B2Cache coherency state request vector encoding and use thereof
Publication Date: 2025.12.09 SIFIVE INC
  • US12493551B2 patent drawing
  • US12493551B2 patent drawing
  • US12493551B2 patent drawing

AI summary

A method and apparatus for a cache coherency state request vector is described. A method includes selecting, by a first agent, one or more bits in a cache coherency state request vector, where a selected bit in the cache coherency state request vector indicates an acceptable cache coherency state for a cache block indicated in a request message, transmitting, by the first agent to a second agent, the request message for the cache block, the request message including the cache coherency state request vector, and receiving, by the first agent from the second agent, a response message with a cache coherency response state, wherein the cache coherency response state indicates a cache coherency state responsive to the cache coherency state request vector.