Cache Subsystem Segmentation for Power and Heat Reduction

Solution Overview

Problem

The cache subsystem in memory systems, such as solid-state drives, consumes excessive power and generates heat due to high clock frequencies, negatively impacting overall performance from high volumes of read and write requests.

Innovation Solution

Dividing the cache subsystem into multiple cache controllers and memories, with a scheduler distributing operations to allow each to operate at a lower clock frequency, maintaining comparable performance while reducing power consumption and heat generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the cache subsystem operates at high clock frequency to handle high volumes of read and write requests, then the performance is improved, but power consumption increases and heat is generated

Engineering Contradiction:

ImproveperformanceVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The cache subsystem is divided into multiple independent cache controllers and cache memories, each operating at a lower clock frequency. The scheduler distributes operations across these subdivisions, maintaining overall system performance while reducing power consumption and heat generation in each individual component.

Inventive Principle:

Principle #1Segmentation

2Productivity

If the cache subsystem operates at high clock frequency to handle high volumes of read and write requests, then the performance is improved, but heat generation increases

Engineering Contradiction:

ImproveperformanceVSAvoidheat generation

Core Design Contradiction:

ProductivityVSTemperature

Solution Approach 1:

The cache subsystem is divided into multiple independent cache controllers and cache memories, each operating at a lower clock frequency. The scheduler distributes operations across these subdivisions, maintaining overall system performance while reducing power consumption and heat generation in each individual component.

Inventive Principle:

Principle #1Segmentation

3Use of energy by moving object

If the cache subsystem is divided into multiple cache controllers and memories with a scheduler, then power consumption and heat generation are reduced, but device complexity increases

Engineering Contradiction:

Improvepower consumptionVSAvoidsystem complexity

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The cache subsystem is divided into multiple independent cache controllers and cache memories, each operating at a lower clock frequency. The scheduler distributes operations across these subdivisions, maintaining overall system performance while reducing power consumption and heat generation in each individual component.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The scheduler serves multiple functions: it distributes operations to cache subdivisions, tracks the status of pending operations, manages cache hits and misses, and coordinates data movement between cache and media. This multi-functionality justifies the added complexity by consolidating control logic in a single component.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10691595B2Cache in a non-volatile memory subsystem

Publication Date: 2020.06.23 MICRON TECHNOLOGY INC

AI summary

A first request to perform an operation at an address associated with a media is obtained. The operation is issued to a plurality of cache divisions, wherein each cache division comprises a cache controller and a cache memory. A location in another memory associated with the first request is updated, the location in the other memory including a plurality of indicators corresponding to a status of the operation with each of the plurality of cache divisions. Based on one or more responses from the cache division(s), a response to the first request is sent.