Multi-Level Cache Synonym Resolution via L2 Directory
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Solution Overview
Problem
Existing cache memory hierarchies face challenges in resolving synonym conflicts while maintaining cache coherency, which can lead to inefficiencies and increased complexity in processor pipeline cycles.
Innovation Solution
A multi-level cache hierarchy system where L2 directories manage synonym conflicts by sending invalidate requests to L1 caches before returning fetch data, using a single value of synonym bits for all L1 caches under a given L2 cache, and processing xi's similarly to cache coherency requests, without requiring unique sequencing or additional design complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synonym conflicts are resolved using traditional cache coherency protocols, then cache coherency is maintained, but device complexity and cycle time increase
Solution Approach 1:
The patent extracts synonym conflict resolution from the complex cache coherency protocol sequencing and handles it independently through directory-based validation. Instead of integrating synonym resolution into the multi-step coherency handshake, the system separates this function by validating synonyms directly in the L2 directory before data transfer, eliminating the need for special sequencing logic.
Solution Approach 2:
The patent segments the address validation process into two independent parts: cache coherency validation and synonym validation. The directory array is structured to hold both coherency state information and synonym bits separately, allowing each validation type to proceed independently without interfering with the other, thus reducing overall system complexity.
2Measurement precision
If synonym bits are stored in each L1 cache directory entry, then synonym resolution accuracy improves, but silicon area increases
Solution Approach 1:
The patent merges the synonym storage function into the L2 cache directory structure rather than duplicating it in each L1 cache. The L2 directory contains synonym bits for all L1 caches under its control, allowing centralized management of synonym information. This consolidation eliminates redundant storage across multiple L1 caches while maintaining full synonym resolution capability.
Solution Approach 2:
The L2 cache directory acts as an intermediary that centralizes synonym bit storage for multiple L1 caches. Instead of each L1 cache maintaining its own synonym bits, the L2 directory serves as a shared repository that all L1 caches reference during validation, reducing total silicon area while preserving accuracy.
3Adaptability or versatility
If multiple directory arrays are used to handle synonym conflicts, then synonym resolution capability improves, but device complexity increases
Solution Approach 1:
The patent makes the L2 cache directory multi-functional by enabling it to perform both cache coherency validation and synonym validation in a unified structure. The directory array is designed to interpret address bits differently based on the operation type, eliminating the need for separate specialized directory arrays for each function and reducing overall system complexity.
Solution Approach 2:
The patent changes the interpretation parameters of the directory array based on operation type rather than creating separate physical structures. The same directory array hardware is configured to validate different address bits (coherency tags vs. synonym bits) depending on whether the operation is a coherency check or a synonym check, providing versatility without increasing physical complexity.
Data Source
AI summary
Method and system for a multi-level virtual/real cache system with synonym resolution. An exemplary embodiment includes a multi-level cache hierarchy, including a set of L1 caches associated with one or more processor cores and a set of L2 caches, wherein the set of L1 caches are a subset of the set of L2 caches, wherein the set of L1 caches underneath a given L2 cache are associated with one or more of the processor cores.