Cache Track Repositioning via Deferred Flagging
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Solution Overview
Problem
Current cache management systems face significant lock contention and latency issues when moving tracks to the Most Recently Used (MRU) end of the cache list, particularly due to the need for obtaining locks and batch processing, which affects read/write request processing efficiency.
Innovation Solution
The proposed solution involves setting a flag for accessed tracks with low cache residency times, allowing them to remain in their current position until reaching the LRU end, thereby reducing unnecessary repositioning and lock contention, and only moving them to the MRU end when necessary, thus optimizing cache latency and hit ratios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tracks are moved to the MRU end of the cache list when accessed, then the cache hit ratio is improved, but lock contention increases and processing latency worsens
Solution Approach 1:
The patent extracts the track repositioning operation from the critical lock-protected section. Instead of moving tracks to MRU end within the lock, the system sets a flag bit in the track entry that indicates the track should be moved to MRU end. The actual repositioning is deferred to a later time when the lock is not needed, eliminating the bottleneck while preserving the cache hit ratio benefit.
Solution Approach 2:
The system performs preliminary action by setting the flag bit during the locked critical section to mark tracks for future repositioning. This preliminary marking allows the system to prepare the repositioning information without actually performing the time-consuming move operation while holding the lock, thus reducing lock contention and processing latency.
2Ease of operation
If tracks are batched in an MRU array before moving to MRU end, then lock contention is reduced, but device complexity and processing overhead increase
Solution Approach 1:
Instead of maintaining a separate MRU array structure and copying tracks into it, the patent uses a simple flag bit copy mechanism. The flag bit is set in the track entry itself during the critical section, and the same flag is checked during the deferred repositioning phase. This copying approach avoids the complexity of maintaining parallel data structures while still achieving batched repositioning efficiency.
3Stability of the object's composition
If locks are obtained for every track access to maintain LRU list order, then cache list consistency is maintained, but processing speed decreases
Solution Approach 1:
The patent extracts the actual track repositioning operation from the lock-protected critical section. Only the essential flag bit setting is performed while holding the lock, ensuring cache list consistency is maintained. The time-consuming actual move operation is extracted and performed later outside the lock, dramatically improving request processing speed while preserving consistency through the flag mechanism.
Solution Approach 2:
The flag bit serves as an intermediary between the track access operation and the actual repositioning operation. It carries the information that a track should be repositioned to MRU end without requiring the track to be physically moved during the critical locked section. This intermediary mechanism maintains cache list consistency while enabling high-speed processing.
Data Source
AI summary
A computer program product, system, and method for managing adding of accessed tracks in cache to a most recently used end of a cache list. A cache list for the cache has a least recently used (LRU) end and a most recently used (MRU) end. Tracks in the cache are indicated in the cache list. A track in the cache indicated on the cache list is accessed. A determination is made as to whether a track cache residency time since the accessed track was last accessed while in the cache list is within a region of lowest track cache residency times. A flag is set for the accessed track indicating to indicate the track at the MRU end in response to determining that the track cache residency time of the accessed track is within the region of lowest track cache residency times. The accessed track remains at a current position in the cache list before being accessed after setting the flag.