Cache Memory System Virtual Index Physical Tag Aliasing Detection
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Solution Overview
Problem
The VIPT architecture faces challenges with cache aliasing issues when the cache memory size exceeds the physical page size, leading to decreased memory access rates and increased access times due to the need for address translation and full cache flushing.
Innovation Solution
A cache memory system and method that uses a Virtual Indexed Physical Tagged architecture to detect cache aliasing using virtual addresses only, preventing data of the same physical block from being stored in multiple cache lines by obtaining virtual indexes and physical tags, and comparing them to prevent cache aliasing without requiring address translation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If address translation is performed to detect cache aliasing, then cache aliasing detection accuracy is improved, but memory access rate decreases due to additional translation time
Solution Approach 1:
The patent performs preliminary comparison of virtual tags with tag information in the tag array before performing address translation. By using the virtual index to access the tag array and comparing virtual tags early, the system can detect cache aliasing conditions without waiting for the slower address translation to complete, thus maintaining high memory access rates while ensuring accurate detection
Solution Approach 2:
The patent introduces virtual tags as an intermediary mechanism that bridges virtual addresses and physical tags. Instead of directly translating virtual addresses to physical addresses for comparison, the system uses virtual tags derived from virtual addresses to perform early comparisons with tag information, enabling accurate cache aliasing detection without the performance penalty of full address translation
2Reliability
If full cache flushing is performed to prevent cache aliasing, then data consistency is improved, but memory access time increases due to cache invalidation overhead
Solution Approach 1:
The patent extracts and compares only the relevant tag information from the tag array using virtual indexes, rather than flushing the entire cache. By identifying and handling only the specific cache lines that may have aliasing relationships through virtual tag comparison, the system maintains data consistency without the performance penalty of invalidating the entire cache
Solution Approach 2:
The system performs preliminary identification of potentially aliased cache lines using virtual tag comparison before any cache flushing occurs. This allows the system to target only the specific cache lines that need invalidation rather than performing a blanket full cache flush, thereby reducing the time loss while ensuring data consistency
3Speed
If virtual indexes are used to access tag array without address translation, then memory access speed is improved, but cache aliasing detection accuracy may worsen
Solution Approach 1:
The patent uses virtual tags as an intermediary that preserves the relationship between virtual addresses and cache line identifiers. By deriving virtual tags from virtual addresses and using them to access the tag array, the system maintains accurate cache aliasing detection capability while avoiding the speed penalty of address translation, as the virtual tag structure inherently encodes the necessary identification information
Data Source
AI summary
The cache memory system 1 comprises: a virtual index obtaining unit 13 operable to obtain, based on a virtual address, virtual indexes of an access-target cache line and a cache line potentially having a cache-aliasing relationship with the access-target cache line; a physical tag obtaining unit 15 operable to obtain a physical tag of a physical page by performing address translation on the virtual address; and a comparing unit 16 operable to compare a physical tag TAG obtained by the physical tag obtaining unit 15 with each tag information piece TAG(i) belonging to cache lines corresponding to the virtual indexes and output from the tag array 11a based on the virtual indexes obtained by the virtual index obtaining unit 13, and determines a cache hit/miss.