Cache Hierarchy Way Indication for Power Reduction
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Solution Overview
Problem
In cache hierarchies, the power consumption associated with handling messages between higher and lower level caches, especially during operations like clean and invalidate, is significant due to the need for full lookup procedures in lower level caches.
Innovation Solution
Implementing a set associative cache hierarchy where the higher level cache provides a way indication to the lower level cache during allocation, allowing the lower level cache to store this indication and use it to control targeted access, thereby excluding unnecessary storage blocks and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If full lookup procedures are performed in lower level caches during clean and invalidate operations, then cache coherence is maintained, but power consumption increases significantly
Solution Approach 1:
The higher level cache performs preliminary actions by tracking which cache ways contain valid data and proactively providing this information to the lower level cache before coherence operations are needed. This preliminary tracking eliminates the need for full lookup procedures during clean and invalidate operations, thereby maintaining cache coherence while reducing power consumption.
Solution Approach 2:
The system implements feedback mechanisms where the higher level cache provides information about valid data locations to the lower level cache through coherence messages. This feedback loop allows the lower level cache to perform targeted operations only where needed, rather than performing complete lookups across all cache ways, thus maintaining coherence with reduced energy expenditure.
2Reliability
If the lower level cache performs full lookups to handle messages from higher level cache, then cache coherence is ensured, but unnecessary storage block access increases
Solution Approach 1:
The lower level cache applies local quality by performing targeted operations only on specific cache ways that contain valid data, as indicated by information received from the higher level cache. Instead of uniformly accessing all storage blocks, the system identifies and operates only on the local subset where data is actually present, ensuring coherence while improving operational efficiency.
Solution Approach 2:
The cache hierarchy segments the cache ways into distinct units, with the higher level cache tracking which segments contain valid data. This segmentation allows the lower level cache to receive targeted information about specific cache way segments and perform operations only on those segments, rather than performing full lookups across the entire cache structure.
3Productivity
If way indication is provided from higher level cache to lower level cache during allocation, then targeted access is enabled, but additional communication overhead is introduced
Solution Approach 1:
The way indication mechanism serves multiple functions: it tracks valid data locations during allocation, provides coherence information during clean operations, and guides invalidate operations. By making this single mechanism multi-functional, the system avoids introducing separate communication protocols for each operation type, thereby enabling targeted access while minimizing additional communication overhead.
Solution Approach 2:
The system merges the tracking of valid data locations with the coherence message passing mechanism. The way indication is combined with existing allocation and coherence protocols rather than being a separate communication channel, allowing the lower level cache to receive both allocation information and coherence requirements through unified message structures.
Data Source
AI summary
A technique is provided for managing caches in a cache hierarchy. An apparatus has processing circuitry for performing operations and a plurality of caches for storing data for reference by the processing circuitry when performing the operations. The plurality of caches form a cache hierarchy including a given cache at a given hierarchical level and a further cache at a higher hierarchical level. The given cache is a set associative cache having a plurality of cache ways, and the given cache and the further cache are arranged such that the further cache stores a subset of the data in the given cache. In response to an allocation event causing data for a given memory address to be stored in the further cache, the given cache issues a way indication to the further cache identifying which cache way in the given cache the data for the given memory address is stored in. In response to the allocation event, the further cache not only stores the data for the given memory address, but also retains the way indication whilst the data for the given memory address remains stored within the further cache. When the further cache subsequently issues a message to the given cache relating to the data for the given memory address, it provides the way indication to the given cache for use in controlling an access to the given cache.