Cache Utilization for WRITE SAME Commands

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Solution Overview

Problem

Conventional storage devices inefficiently use cache memory when handling WRITE SAME SCSI commands, as they write redundant data to cache for each address in a range of logical block addresses, leading to inefficient cache utilization.

Innovation Solution

Implement a method where the data storage device receives a write command indicating a data portion and a range of addresses, storing indicia in the cache that each address comprises the data portion, and updating this indicia when a second write command is received, allowing for efficient destaging and reducing data stored in the cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the controller writes the data to the cache for each address in the range of logical block addresses in response to a WRITE SAME command, then the data can be written to outer level storage, but the cache memory is inefficiently used due to redundant data storage

Engineering Contradiction:
Improvedata write completenessVSAvoidcache memory usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges multiple identical data writes into a single cache entry by storing a pointer to the data portion combined with a range descriptor that specifies the start address and number of logical blocks. This consolidation reduces cache memory consumption while maintaining the ability to write the same data to multiple addresses on the outer level storage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The cache entry structure is enhanced to serve multiple functions: it stores the data portion pointer, the range descriptor (start address and block count), and implicitly supports both single-address and range-address writes. This multi-functionality allows the cache to handle both traditional write operations and WRITE SAME commands efficiently using the same cache infrastructure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If the cache stores redundant data for each address in the range, then all addresses can be written to outer level storage, but the performance is degraded due to inefficient cache utilization

Engineering Contradiction:
Improvedata write throughputVSAvoidcache memory capacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent combines multiple address targets into a single cache entry by using a range descriptor that specifies the start address and number of logical blocks. This merging allows the cache to track a group of addresses that will receive identical data, reducing the number of cache entries needed and improving overall write throughput by eliminating redundant storage operations.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If the cache memory is used to store data for each address, then data can be cached for fast access, but the cache size must be large to handle range writes efficiently

Engineering Contradiction:
Improvedata access speedVSAvoidcache memory size
Core Design Contradiction:
SpeedVSVolume of stationary object

Solution Approach 1:

The patent merges multiple address specifications into a single cache entry using a range descriptor format that includes a start address and a block count. This approach maintains fast data access by keeping the data portion in cache while reducing the cache memory volume required, as one cache entry can represent multiple destination addresses on the outer level storage.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9009426B1Methods, computer readable media, and systems for optimizing cache utilization
Publication Date: 2015.04.14 EMC IP HLDG CO LLC
  • US9009426B1 patent drawing
  • US9009426B1 patent drawing
  • US9009426B1 patent drawing

AI summary

A method of storing data on a data storage device having a cache, includes receiving, by the data storage device, a write command indicating a data portion and a range of addresses on the data storage device, the write command instructing the data storage device to write the data portion to each address in the range of addresses; and storing, in the cache, indicia that each address in the range of addresses comprises the data portion.