Cached BFEA Lookup Tables for Faster NAND Read Voltage Correction
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Solution Overview
Problem
Existing memory devices face inefficiencies in managing temporal voltage shifts due to slow charge loss (SCL), leading to increased bit error rates during read operations, which current block family error avoidance (BFEA) schemes address but at the cost of time and resource consumption.
Innovation Solution
Implementing caching of lookup tables in a single-cycle access memory to reduce the time and resource consumption associated with determining threshold voltage offsets for block families, thereby enhancing the efficiency of BFEA schemes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If block family error avoidance schemes are implemented to address temporal voltage shifts, then read accuracy is improved, but time and resource consumption increase
Solution Approach 1:
The patent pre-calculates and stores threshold voltage offsets for different block families in lookup tables before read operations occur. During actual read operations, the system simply retrieves pre-computed offset values based on block family identifiers, avoiding time-consuming real-time calculations and significantly reducing access time while maintaining read accuracy
Solution Approach 2:
The patent creates simplified copies of threshold voltage offset data in the form of lookup tables that map block family identifiers to pre-determined offset values. These copied data structures enable rapid access during read operations without requiring complex real-time computations, thus reducing time consumption while preserving measurement precision
2Measurement precision
If block family error avoidance schemes are implemented to address temporal voltage shifts, then read accuracy is improved, but computing resources are consumed
Solution Approach 1:
The system performs computationally intensive threshold voltage offset calculations in advance and stores results in lookup tables. During read operations, only simple table lookups are required, dramatically reducing computing resource consumption while maintaining the ability to correct temporal voltage shifts and ensure read accuracy
Solution Approach 2:
Complex threshold voltage offset data is copied into simplified lookup table structures that require minimal processing power to access. This copying transforms resource-intensive real-time calculations into efficient data retrieval operations, reducing computing resource usage while preserving correction effectiveness
3Speed
If lookup tables are cached in single-cycle access memory, then lookup time is reduced, but device complexity increases
Solution Approach 1:
The patent divides the memory system into distinct segments: volatile memory for caching lookup tables and non-volatile memory for storing actual data. This segmentation allows the volatile memory to be optimized for fast access while the non-volatile memory handles data storage, reducing overall device complexity while achieving single-cycle lookup times
Data Source
AI summary
In some implementations, a memory device may cache a subset of one or more block family error avoidance (BFEA) lookup tables associated with a block family associated with host data in a first memory location. The block family may be based on at least one of a time window during which the host data was written or a temperature window at which the host data was written. The memory device may receive a read command associated with host data and determine, based on the block family and the subset of the one or more BFEA tables, a threshold voltage offset associated with the host data. The memory device may compute a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the host data. The memory device may read, using the modified threshold voltage, the host data from the first memory location.