Caching Namespace for Nonvolatile Storage Write Bandwidth

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Solution Overview

Problem

Nonvolatile storage devices face challenges in providing sufficient write bandwidth, especially for latency-sensitive applications, due to host-write throttling and limited capacity, which hinders performance in use cases requiring high on-demand write performance for limited data.

Innovation Solution

Implementing an enhanced-write-bandwidth caching stream that separates host write requests into latency-sensitive and general streams, exempting the latter from throttling and requiring invalidation of logical blocks in the order they were programmed, while maintaining a reserved logical namespace for caching to ensure continuous availability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If host-write throttling is implemented to manage storage capacity, then device lifespan is extended, but write performance for latency-sensitive applications deteriorates

Engineering Contradiction:
Improvedevice lifespanVSAvoidwrite performance
Core Design Contradiction:
Duration of action of stationary objectVSProductivity

Solution Approach 1:

The patent segments the address space into a caching namespace and a non-caching namespace. The caching namespace is exempt from host-write throttling and is dedicated to latency-sensitive write operations, while the non-caching namespace continues to be managed with traditional throttling. This segmentation allows the system to preserve device lifespan through throttling in the non-caching namespace while providing high write performance in the caching namespace for latency-sensitive applications.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If garbage collection is performed to reclaim storage space, then storage capacity is maintained, but write amplification increases

Engineering Contradiction:
Improvestorage capacityVSAvoidwrite amplification
Core Design Contradiction:
Quantity of substanceVSLoss of substance

Solution Approach 1:

The patent implements preliminary action by requiring the host to invalidate logical blocks in the caching namespace in the same order they were programmed. This sequential invalidation pattern allows the storage device to efficiently reclaim storage space without requiring extensive garbage collection operations, as blocks become available for reuse in a predictable, sequential manner. This reduces write amplification while maintaining storage capacity.

Inventive Principle:
Principle #10Preliminary action

3Duration of action of stationary object

If over-provisioning is implemented to extend device lifespan, then perceived lifespan is improved, but available storage capacity decreases

Engineering Contradiction:
Improveperceived lifespanVSAvoidavailable storage capacity
Core Design Contradiction:
Duration of action of stationary objectVSQuantity of substance

Solution Approach 1:

The caching namespace serves multiple functions: it provides high-performance write bandwidth for latency-sensitive applications, maintains device lifespan through controlled usage patterns, and enables efficient space reclamation through sequential invalidation. By making the caching namespace multi-functional, the system achieves extended device lifespan without proportionally sacrificing available storage capacity, as the caching namespace is efficiently utilized for specific high-performance workloads.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10048876B2Method for providing nonvolatile storage write bandwidth using a caching namespace
Publication Date: 2018.08.14 WESTERN DIGITAL TECHNOLOGIES INC
  • US10048876B2 patent drawing
  • US10048876B2 patent drawing
  • US10048876B2 patent drawing

AI summary

An apparatus for implementing an enhanced-write-bandwidth caching stream includes a memory that stores machine instructions and a processor that executes the machine instructions. The apparatus receives a first host write stream and a second host write stream that comprises latency-sensitive host write requests. The apparatus also subjects the first host write stream to host-write throttling, and exempts the second host write stream from host-write throttling. The apparatus further requires that the second host write stream invalidate logical blocks in an order corresponding to a previous order in which the respective logical blocks were previously programmed.