Calculation Device Overlapping Communication and Computation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing Ising machines face challenges in solving large-scale optimization problems efficiently due to increased communication overhead as the number of computational resources grows, leading to prolonged total computation time.

Innovation Solution

A calculation device employing a simulated bifurcation algorithm, utilizing a network of P calculation cores that overlap communication and computation by performing interaction and time evolution operations in parallel, reduces the impact of communication latency and enhances the speed of solving large-scale combinatorial optimization problems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of computational resources is increased to solve large-scale optimization problems, then the calculation scale and stability are improved, but the total calculation time is prolonged due to communication overhead between computational resources

Engineering Contradiction:
Improvenumber of computational resourcesVSAvoidtotal calculation time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent applies preliminary action by having calculation cores perform interaction operations in advance before communication is required. Specifically, each calculation core computes interaction results using locally stored data from other cores, preparing the data beforehand so that when communication needs to occur, the actual data transfer time is minimized. This is evident in the embodiment where calculation cores perform preliminary computations using stored coupling coefficient matrices and bias arrays before needing to exchange results.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the computational workload by dividing the optimization problem into multiple independent calculation cores, each handling a portion of the variables. Each core maintains local data (coupling coefficients, biases) and performs computations independently, reducing the need for frequent communication. The segmentation allows parallel processing while minimizing communication overhead, as each core works with its assigned subset of variables and only needs to exchange specific intermediate results with others.

Inventive Principle:
Principle #1Segmentation

2Productivity

If computational resources are increased using scale-out technology, then performance is improved, but communication overhead between computational resources prolongs the total calculation time

Engineering Contradiction:
ImproveperformanceVSAvoidtotal calculation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements continuity of useful action by ensuring that calculation cores continuously perform productive computations rather than idle during communication periods. Each core continuously updates its local variables and computes interaction terms, maintaining productive work throughout the calculation process. This is achieved by having cores perform interaction operations using locally stored data, ensuring that time is not wasted waiting for communication when computation could be performed.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent applies preliminary action by having calculation cores perform interaction operations in advance before communication is required. Specifically, each calculation core computes interaction results using locally stored data from other cores, preparing the data beforehand so that when communication needs to occur, the actual data transfer time is minimized. This is evident in the embodiment where calculation cores perform preliminary computations using stored coupling coefficient matrices and bias arrays before needing to exchange results.

Inventive Principle:
Principle #10Preliminary action

3Speed

If hardware-based Ising machines are used to achieve fast computation, then calculation speed is improved, but scale increase and stable operation become difficult

Engineering Contradiction:
Improvecalculation speedVSAvoidscale increase difficulty
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies mechanics substitution by replacing the physical hardware-based Ising machine with a simulated bifurcation algorithm implemented on standard computational resources. Instead of using quantum annealers, coherent Ising machines, or other specialized hardware that face scaling and stability issues, the invention uses a software-based algorithm that can run on conventional computers or processors. This substitution maintains fast computation through efficient algorithm design while avoiding the hardware complexity and scaling limitations of physical systems.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent applies parameter changes by transforming the physical Ising model parameters (spins, coupling coefficients) into mathematical parameters suitable for the simulated bifurcation algorithm. The discrete spin variables are replaced with continuous variables that evolve according to differential equations, and the binary coupling coefficients become parameters in the simulation. This parameter transformation allows the problem to be solved using standard computational methods while maintaining the essential optimization structure, enabling scaling to large problems without hardware limitations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4145355B1Calculation device
Publication Date: 2024.12.25 KK TOSHIBA
  • EP4145355B1 patent drawingFigure 1
  • EP4145355B1 patent drawingFigure 2
  • EP4145355B1 patent drawingFigure 3~4

AI summary

According to an arrangement, a calculation device (10) includes P calculation cores (14) each connected to a network (12). The P calculation cores (14) calculate N first variables representing position and N second variables representing momentum in N oscillators, sequentially for each time step from an initial time to an end time. The P calculation cores (14) output values based on N first variables at the end time as values based on a solution of an optimization problem. The kth calculation core (14) includes an interaction circuit (38) configured to calculate, at each time step, M intermediate variables corresponding to M oscillators, based on N first variables at the previous time step. The interaction circuit (38) includes an intermediate variable memory (44) configured to store M intermediate variables under calculation. At each time step, the interaction circuit (38) starts calculation of M intermediate variables before a receiving circuit (22) completes reception of all of (N-M) first variables at the previous time step.