Calibrating Analog Resistive Processing Unit Arrays
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Solution Overview
Problem
Analog resistive processing unit (RPU) systems in neuromorphic computing face significant errors due to non-idealities such as mismatches, offsets, leakage, and parasitic resistances, leading to variations in multiply-and-accumulate (MAC) results during matrix-vector multiplication operations.
Innovation Solution
A calibration process is implemented to iteratively adjust and reprogram the weight values in the RPU array, reducing variations in output lines by adjusting zero vectors and tuning weights, and applying weight scaling factors to minimize offset and slope variations, thereby improving the accuracy of MAC results without requiring digital hardware calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If analog RPU hardware is used to perform MAC operations, then computation speed and parallelism are improved, but hardware non-idealities (mismatches, offsets, leakage, parasitic resistances) cause significant errors in MAC results
Solution Approach 1:
The patent applies preliminary action by performing calibration before actual computation. The system pre-characterizes each output line's non-idealities (offsets, slopes, spread) and stores calibration data that will be used during MAC operations to compensate for these errors, thereby improving accuracy without sacrificing the speed benefits of analog computation
Solution Approach 2:
The patent implements feedback by using the measured MAC results to iteratively adjust and refine the calibration parameters. The system compares actual MAC results with expected results, feeds back the error information, and adjusts the calibration data to minimize discrepancies, thereby continuously improving measurement precision while maintaining computation speed
2Measurement precision
If digital calibration hardware and circuitry are added to correct MAC result variations, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent uses copying by creating a digital model (copy) of the analog hardware's non-idealities through calibration measurements. This digital replica captures the offset, slope, and spread characteristics of each output line, allowing software-based correction algorithms to compensate for hardware errors without adding complex physical calibration circuitry
Solution Approach 2:
The patent replaces mechanical/electrical calibration hardware with software-based correction. Instead of using additional analog or digital circuitry to physically adjust and correct MAC results, the system substitutes a software algorithm that processes the calibration data and compensates for errors computationally, thereby reducing device complexity and power consumption
Data Source
AI summary
A system comprises a processor, and a resistive processing unit (RPU) array. The RPU array comprises an array of cells which respectively comprise resistive memory devices that are programable to store weight values. The processor is configured to obtain a matrix comprising target weight values, program cells of the array of cells to store weight values in the RPU array, which correspond to respective target weight values of the matrix, and perform a calibration process to calibrate the RPU array. The calibration process comprises iteratively adjusting the target weight values of the matrix, and reprogramming the stored weight values of the matrix in the RPU array based on the respective adjusted target weight values, to reduce a variation between output lines of the RPU array with respect to multiply-and-accumulate distribution data that is generated and output from respective output lines of the RPU array during the calibration process.


