Configurable Context Save and Restore via CALLQ RETQ Instructions

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Solution Overview

Problem

Existing processor architectures face inefficiencies in handling context data during subroutine calls and returns, as they either incur additional latency from separate instructions for context storage and restoration or waste resources by storing unnecessary data with default contexts.

Innovation Solution

The introduction of CALLQ and RETQ instructions that explicitly identify context registers to be stored or restored within the instruction itself, allowing for a configurable context without the need for separate instructions, thereby avoiding unnecessary latency and resource waste.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate instructions are used for context storage and restoration, then context management is achieved, but additional latency is incurred

Engineering Contradiction:
Improvecontext managementVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the context storage and restoration operations into the CALLQ and RETQ instructions themselves. The CALLQ instruction combines the jump operation with context register storage, while the RETQ instruction combines the return operation with context register restoration, eliminating the need for separate instructions and reducing latency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The context registers are stored as a preliminary action within the CALLQ instruction before the subroutine execution begins. This preliminary storage of context data eliminates the need for separate post-execution restoration operations, as the restoration is seamlessly integrated into the RETQ return instruction.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If default contexts are used for storage, then context management is simplified, but unnecessary data is stored wasting resources

Engineering Contradiction:
Improvecontext managementVSAvoidresource waste
Core Design Contradiction:
Ease of operationVSLoss of substance

Solution Approach 1:

The patent applies local quality by allowing different subsets of context registers to be stored based on the specific subroutine's needs. The CALLQ and RETQ instructions can be configured to store only the necessary context registers rather than a fixed default set, optimizing resource usage by storing only what is locally required for each calling scenario.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The context storage mechanism is made dynamic through configurable instruction variants (CALLQ, RETQ) that can specify different context register subsets. This dynamic approach allows the system to adapt the context storage to the specific requirements of each subroutine call, avoiding the resource waste associated with static default context storage.

Inventive Principle:
Principle #15Dynamics

3Productivity

If configurable context registers are stored, then processing efficiency is improved, but instruction complexity increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidinstruction complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The CALLQ and RETQ instructions serve multiple functions: they perform the subroutine call/return operation, manage context register storage/restoration, and provide configurable selection of which context registers to manage. This multi-functionality consolidates what would otherwise require separate instructions, improving processing efficiency without proportionally increasing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250094209A1Configurable context save and restore
Publication Date: 2025.03.20 INFINEON TECHNOLOGIES AG
  • US20250094209A1 patent drawing
  • US20250094209A1 patent drawing
  • US20250094209A1 patent drawing

AI summary

Systems, devices, circuitries, and methods are disclosed for identifying, within a call instruction, context registers for storing prior to a jump to another subroutine. In one example, a method includes receiving, while executing a first subroutine, a call instruction that includes a first opcode and a first set of bits, wherein the call instruction identifies a first target address, wherein the first target address stores a first instruction of a set of instructions for performing a second subroutine. A first set of context registers mapped to the first set of bits is identified and content of the first set of context registers is stored in first memory allocated for context storage for the first subroutine. The first instruction stored in the first target address is executed.