CAM Arbiter Emulates ROM for Field Data Updates
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Solution Overview
Problem
Existing electronic systems face challenges in efficiently updating data stored in non-configurable ROM after manufacture, as they are costly and complex to reconfigure, and existing solutions either consume excessive memory or compromise system speed and reliability.
Innovation Solution
A circuit utilizing a content-addressable memory (CAM) arbiter to emulate ROM locations, allowing direct access to replacement data from configurable memory, thereby enabling field upgrades with minimal impact on cost, size, and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ROM is used for storing operation code, then cost and reliability are improved, but adaptability and ease of repair deteriorate
Solution Approach 1:
A CAM-based arbiter is introduced as an intermediary component between the ROM and the system. The arbiter intercepts address requests, compares them against stored direct addresses, and redirects requests for updated code to emulation addresses in configurable memory. This mediator enables ROM to maintain its reliability while providing adaptability through the arbiter's address translation capability.
2Adaptability or versatility
If configurable memory is used for storing operation code, then adaptability is improved, but area consumption and cost increase
Solution Approach 1:
The memory system is segmented into two distinct parts: a large ROM block for storing the complete original operation code, and a small configurable memory block for storing only the updated code segments. The CAM arbiter manages this segmentation by routing address requests to the appropriate memory block, thereby minimizing the area required for configurable memory while maintaining full adaptability.
3Adaptability or versatility
If a virtual memory system with ancillary PROM blocks is used, then adaptability is improved, but device complexity increases
Solution Approach 1:
The complex software-based virtual memory management system is replaced with a hardware-based CAM arbiter that performs address comparison and redirection in a single clock cycle. This substitution eliminates the need for complex software routines, multiple ancillary PROM blocks, and sophisticated arbitration logic, thereby reducing device complexity while maintaining adaptability.
Data Source
AI summary
A method for providing field updates through the use of a memory emulation circuit with a content addressable memory (CAM) as the intelligent portion of the emulation circuit's arbiter. CAM circuit 200 is comprised of configurable memory and is initially unprogrammed. Address requests are passed straight through multiplexer 201 to Read Only Memory (ROM) 202. As a result the data in the data location in ROM 202 that corresponds to the requested address will be output to data bus 205. If data locations in ROM 202 become defective or contain data that needs to be upgraded the circuit implements a remapping of the data location. CAM circuit 200 is programmed with direct addresses to be replaced in ROM 202. The direct addresses are paired to emulation addresses of data locations in configurable memory 203. Upgraded or substitute data is programmed into the configurable memory 203 at the paired emulation address. When address requests are received thereafter, CAM circuit 200 compares the address request to its stored direct addresses. If a match is found the paired emulation address is passed through multiplexer 201 instead of the direct address. As a result, the substitute or upgraded data in configurable memory 203 is output to data bus 205 in place of the old data.