Nonvolatile Memory CAM Block Voltage Control
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Solution Overview
Problem
Nonvolatile memory devices face challenges with high current consumption and reliability issues due to the need for high voltages in content addressable memory (CAM) blocks, which can deteriorate electric characteristics over time.
Innovation Solution
A method where the CAM block includes CAM cells coupled to word lines, with chip information stored on a selected word line and unselected CAM cells in an erased state, allowing for the application of lower pass voltages during reading operations, eliminating the need for a pumping circuit and reducing stress on CAM cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high pass voltage is applied to unselected CAM cells during reading operation, then reading operation can be performed, but current consumption increases and electric characteristics deteriorate over time
Solution Approach 1:
The CAM block is segmented into selected and unselected regions, with different voltage levels applied to each. The unselected CAM cells are maintained at a lower voltage level (e.g., 0V or ground potential) while only the selected CAM cells receive the high read voltage, thereby reducing overall power consumption and preventing electric characteristic deterioration in unselected cells.
Solution Approach 2:
Different voltage conditions are applied to different spatial regions of the CAM block. Specifically, unselected CAM cells are held at a low voltage level while the selected CAM cell receives the high voltage needed for reading. This localized voltage application reduces stress on unselected cells and minimizes current consumption while maintaining reading functionality.
2Ease of operation
If high pass voltage is applied to unselected CAM cells during reading operation, then reading operation can be performed, but reliability worsens due to electric characteristic deterioration
Solution Approach 1:
Different voltage conditions are applied to different spatial regions of the CAM block. Specifically, unselected CAM cells are held at a low voltage level while the selected CAM cell receives the high voltage needed for reading. This localized voltage application reduces stress on unselected cells and minimizes current consumption while maintaining reading functionality.
Solution Approach 2:
The voltage level parameter is dynamically changed based on the selection state of CAM cells. Unselected CAM cells are maintained at a low voltage level (e.g., 0V) during reading operations, while the selected CAM cell is switched to a high voltage level. This parameter change ensures reliable reading operation while preventing electric characteristic deterioration in unselected cells.
3Ease of operation
If pumping circuit is added to supply high voltage to unselected CAM cells, then reading operation is enabled, but device complexity increases
Solution Approach 1:
The patent extracts and eliminates the need for the pumping circuit by changing the voltage application strategy. Instead of using a complex pumping circuit to supply high voltage to all unselected CAM cells, the invention applies high voltage only to the selected CAM cell while maintaining unselected cells at low voltage, thereby simplifying the overall device architecture.
Solution Approach 2:
The voltage level parameter is dynamically changed based on the selection state of CAM cells. Unselected CAM cells are maintained at a low voltage level (e.g., 0V) during reading operations, while the selected CAM cell is switched to a high voltage level. This parameter change ensures reliable reading operation while preventing electric characteristic deterioration in unselected cells.
Data Source
AI summary
A nonvolatile memory device includes at least a memory cell block including memory cells that are coupled to a plurality of word lines, respectively, and store data; a content addressable memory (CAM) block including CAM cells that are coupled to the word lines, respectively, and store chip information for operations of the nonvolatile memory device; and a block switching circuit configured to couple the word lines with global word lines; and a voltage supply circuit coupled to the global word lines, for supplying a first read voltage to a selected global word line while supplying a first pass voltage to unselected global word lines in reading the memory cell block, and supplying a second read voltage to a selected global word line while supplying a second pass voltage to unselected global word lines in reading the CAM block, wherein the second pass voltage is lower than the first pass voltage.