Semiconductor Memory CAM Data Programming via Column Address Increment

The patent applies preliminary action by pre-organizing N copies of the same CAM data in advance within a single page buffer before programming. Instead of inputting data N times sequentially, the system prepares all N copies simultaneously in the page buffer, then programs them to N different CAM cell locations in one operation. This eliminates the repeated data input process while maintaining the reliability benefit of storing multiple copies.

The patent transitions from a time-dimensional approach (inputting data N times sequentially) to a spatial-dimensional approach (storing N copies simultaneously in different column locations). By using the column address dimension to differentiate between multiple copies of the same data, the system achieves parallel storage without repeated input operations, thus reducing data input time while maintaining data reliability.

The patent extracts the data replication function from the test equipment and relocates it to the semiconductor memory device itself. By implementing the multi-copy storage capability within the device's page buffer and programming logic, the system eliminates the need for test equipment to maintain large memory capacity for storing multiple copies of CAM data, while still achieving the reliability benefit of N-fold data storage.

The patent uses internal copying mechanisms within the semiconductor memory device to create N copies of the same CAM data in the page buffer, then programs these copies to N different CAM cell locations. This internal copying approach replaces the need for external test equipment to store and manage multiple data copies, thereby reducing the memory capacity requirements of test equipment while maintaining data reliability through multi-copy storage.