CAM Match Line Segmentation for Power Reduction

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Solution Overview

Problem

Content addressable memory (CAM) systems face high power consumption and potential short-circuiting issues due to mismatched match lines, which delays search operations and increases chip area and cost, especially when most search results are mismatches.

Innovation Solution

A semiconductor integrated circuit design that includes a memory cell array, an equalizer circuit, and a precharge circuit, where match lines are divided into parts and precharged to different potentials, allowing only one part to be precharged to a higher potential, reducing power consumption and preventing short-circuiting by equalizing and isolating match lines effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all match lines are precharged to the same potential, then the search operation can be performed, but power consumption increases and short-circuiting occurs between mismatched match lines

Engineering Contradiction:
Improvesearch operation correctnessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The match lines are segmented into two groups: first match lines precharged to a first potential (e.g., VDD) and second match lines precharged to a second potential (e.g., VSS). This segmentation prevents short-circuiting between mismatched match lines while reducing overall power consumption, as only mismatched lines of one potential need to be discharged rather than all match lines being precharged to a high potential.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If match lines are precharged to reduce power consumption, then power consumption decreases, but search operation speed is reduced due to delayed search line activation

Engineering Contradiction:
Improvepower consumptionVSAvoidsearch operation speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The match lines are precharged to different potentials before the search operation begins. This preliminary action allows search lines to be activated immediately without waiting for match line equalization, thereby maintaining high search operation speed while reducing power consumption through the differential precharging scheme.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If match lines are equalized before search operation, then short-circuiting is prevented, but chip area increases and search operation is delayed

Engineering Contradiction:
Improveshort-circuit preventionVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of equalizing all match lines to the same potential before search (which consumes area and time), the invention inverts the approach by precharging match lines to different potentials (VDD and VSS). This inversion prevents short-circuiting through the potential difference itself, eliminating the need for equalization circuits and associated delay while reducing chip area.

Inventive Principle:
Principle #13The other way round (Inversion)

4Productivity

If both first and second match lines are precharged to high potential, then search operation can proceed, but shoot-through current occurs on search lines

Engineering Contradiction:
Improvesearch operation capabilityVSAvoidshoot-through current
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The invention applies equipotentiality by ensuring that when search lines are activated, the corresponding match lines are at the same potential level. By precharging first match lines to VDD and second match lines to VSS, and activating corresponding search lines only when match lines are at the same potential, shoot-through current is prevented while maintaining full search operation capability.

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS10366754B2Semiconductor integrated circuit device with reduced power consumption
Publication Date: 2019.07.30 RENESAS ELECTRONICS CORP
  • US10366754B2 patent drawing
  • US10366754B2 patent drawing
  • US10366754B2 patent drawing

AI summary

A technique for reducing power consumption of a content addressable memory (CAM) system is provided. In a CAM system, an equalizer circuit is coupled to a border portion between a plurality of match line parts generated by dividing each match line corresponding to a piece of entry data, and a precharge circuit precharges each of the match line parts collectively corresponding to a piece of entry data to voltage VDD or VSS. When comparing the entry data and search data, the equalizer circuit couples, in accordance with a control signal, the match line parts after the match line parts are precharged by the precharge circuit. In an equalization period, search operation through the search line is started. A search transistor for comparing search data and entry data includes an NMOS search transistor.