Memory Error Correction Using Content Addressable Memory Redundancy

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Solution Overview

Problem

Current memory systems face challenges in handling recurring single bit errors, which can lead to uncorrectable double bit errors, especially in high temperature environments, causing disruptive system operations and increased costs due to the need for complex and costly error correction codes.

Innovation Solution

Implementing a content addressable memory (CAM) as a redundant system to replace defective memory locations, where a memory location is marked as defective after two failures, allowing the CAM to store corrected data and handle future accesses, thereby reducing the likelihood of double bit errors and minimizing disruptive system operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC is used to correct single bit errors, then reliability is improved, but device complexity increases when two bit errors need correction

Engineering Contradiction:
Improveerror correction capabilityVSAvoidECC complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the error correction approach into two levels: standard ECC for single bit errors and a redundant memory location system for recurring errors. This segmentation allows the system to use simple ECC most of the time while having a specialized fallback mechanism only when needed, avoiding the complexity of a fully robust ECC system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by monitoring error occurrences and proactively replacing defective memory locations with redundant locations before they cause uncorrectable double bit errors. The system tracks which locations have recurring errors and pre-empts potential failures by switching to backup locations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is rewritten and tested whenever an error is detected, then some bit errors are corrected, but system operation becomes disruptive and delayed failures are not caught in time

Engineering Contradiction:
Improveerror correction effectivenessVSAvoidsystem operation continuity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary monitoring of error patterns and proactively replaces defective locations before they cause uncorrectable errors. By tracking which memory locations have recurring errors, the system can preemptively switch to redundant locations without waiting for error occurrence, thus avoiding disruption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory system performs self-diagnosis and self-repair by automatically detecting error patterns, identifying defective locations, and replacing them with redundant locations without external intervention. This self-service capability eliminates the need for disruptive manual error correction operations.

Inventive Principle:
Principle #25Self-service

3Reliability

If a memory location is replaced after two failures, then uncorrectable errors are reduced, but the system requires tracking and management of defective locations

Engineering Contradiction:
Improveuncorrectable error reductionVSAvoiddefective location tracking
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses a content addressable memory (CAM) structure that serves multiple functions: it stores mapping information for redundant locations, tracks error patterns, and manages the replacement logic. This multi-functional approach consolidates what would otherwise require separate tracking mechanisms into a single integrated structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system creates copies of defective memory locations in redundant locations and uses a CAM table to map the original defective addresses to their backup addresses. This copying approach allows the system to maintain functional redundancy without physically replacing the defective hardware, simplifying the tracking and management process.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8402327B2Memory system with error correction and method of operation
Publication Date: 2013.03.19 NXP USA INC
  • US8402327B2 patent drawing
  • US8402327B2 patent drawing
  • US8402327B2 patent drawing

AI summary

A method is provided for error correction of a memory. The method includes: providing a first memory and a second memory; initiating a read operation of the first memory to retrieve data; performing an error correction code (ECC) processing on the data, wherein the ECC processing for determining that at least a portion of the data is erroneous and for providing corrected data; and determining if an address of the erroneous data is stored in the second memory, if the address of the erroneous data is stored in the second memory, storing the corrected data in the second memory, and if the address of the erroneous data is not stored in the second memory, storing the address in the second memory.