CAM-Based Memory Repair System for Defect Replacement

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Higher density memories in semiconductor devices face significant defectivity issues, requiring more redundant resources for repair, which complicates the implementation of advanced semiconductor process technologies.

Innovation Solution

A content addressable memory (CAM) system that activates either row or column redundant elements, partitioning selected redundant elements into different coverage patterns to repair defective memory elements across multiple rows or columns, using activation bits to control switch operations and determine match line pre-charging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If higher density memories are implemented with smaller feature sizes, then memory density is improved, but defectivity increases requiring more redundant resources

Engineering Contradiction:
Improvememory densityVSAvoiddefectivity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments the memory array into multiple banks and divides redundant resources into specialized components: row redundant elements for row repair and column redundant elements for column repair. This segmentation allows targeted repair strategies for different defect types and locations, improving repair efficiency without requiring excessive redundant resources across the entire array.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a universal repair architecture where the repair control logic can selectively activate either row redundant elements or column redundant elements based on the type and location of defects detected. This multi-functional repair system allows a single redundant resource structure to handle multiple repair scenarios, reducing the total amount of redundant resources needed compared to having separate dedicated repair paths for each defect type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If more redundant resources are allocated to repair defects, then memory reliability is improved, but device complexity increases

Engineering Contradiction:
Improvememory reliabilityVSAvoidredundant resources
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs dynamic repair control logic that adaptively selects which redundant resources to activate based on real-time defect detection results. The system can dynamically switch between row repair mode and column repair mode, and can selectively enable or disable specific redundant elements based on the distribution and type of defects found during testing, optimizing resource utilization and reducing the number of permanently required redundant resources.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies local quality by providing different types of redundant resources (row redundant elements vs. column redundant elements) in different locations and configurations within the memory array. Each region can be repaired using the most appropriate redundant resource type for that specific location and defect pattern, rather than using a uniform redundant resource distribution throughout the entire array.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10032515B2Memory repair system and method therefor
Publication Date: 2018.07.24 NXP USA INC
  • US10032515B2 patent drawing
  • US10032515B2 patent drawing
  • US10032515B2 patent drawing

AI summary

A memory system includes a main memory array, a redundant memory array, and a content addressable memory (CAM). The CAM includes a plurality of entries, wherein each entry includes a plurality of column address bits and a plurality of maskable row address bits. When an access address for a memory operation matches an entry of the CAM, the memory system is configured to access the redundant memory array to perform the memory operation.