CAM Error Detection via Segmented Verification
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Solution Overview
Problem
The miniaturization of content-addressable memory (CAM) processes leads to an increase in multi-bit soft errors, causing erroneous data transfers due to wrong CAM entries, which deteriorates search performance and reduces the number of entries that can be accommodated, while also increasing costs.
Innovation Solution
A data transfer apparatus utilizing a first memory to associate search keys with addresses and a second memory to associate addresses with verification information, where the search unit generates search keys, obtains addresses, and verifies the verification information to prevent erroneous transfers, thereby maintaining search performance and entry count without increasing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If verification information of higher bit count is secured to detect multi-bit soft errors, then error detection capability is improved, but search performance deteriorates and entry count is reduced
Solution Approach 1:
The patent divides verification information into multiple segments (first verification information and second verification information) with different bit counts. The first verification information (e.g., 1-bit parity) is used for quick error detection, while the second verification information (e.g., 7-bit ECC) provides enhanced error detection capability when needed. This segmentation allows the system to maintain high search performance using the shorter first verification information while still having the option to use more robust second verification information for critical error detection scenarios.
Solution Approach 2:
The patent applies partial verification by using only the necessary portion of verification information for each error detection scenario. Instead of always using full-strength verification information (which would deteriorate search performance), the system uses partial verification (first verification information with lower bit count) for routine operations and reserves excessive verification (second verification information with higher bit count) for situations requiring higher reliability. This partial action approach maintains search performance while providing adequate error detection capability.
2Reliability
If verification information of higher bit count is secured to detect multi-bit soft errors, then error detection capability is improved, but the number of entries that can be accommodated is reduced
Solution Approach 1:
The patent segments verification information into multiple types with different bit counts. By using the first verification information (shorter bit count) for most entries, the system can accommodate a larger number of entries in the CAM. The second verification information (longer bit count) is used selectively for entries requiring higher error detection capability. This segmentation allows the system to maximize entry count while providing enhanced error detection where necessary.
Solution Approach 2:
The patent applies local quality by assigning different verification information characteristics to different CAM entries based on their specific requirements. Entries that require high error detection capability (e.g., those handling critical data) are assigned second verification information with higher bit count, while other entries use first verification information with lower bit count. This local differentiation allows the system to maintain high entry count overall while providing enhanced error detection capability locally where needed.
3Reliability
If search key and verification information bit counts are increased to handle more users and detect errors, then error detection capability is improved, but search performance deteriorates
Solution Approach 1:
The patent segments verification information into multiple levels (first and second verification information) with different bit counts. The system performs error detection using the shorter first verification information first, which requires less search time. Only when higher error detection capability is needed does the system engage the second verification information. This segmented approach reduces average search time while maintaining the ability to detect errors when required.
Solution Approach 2:
The patent uses partial verification action by applying only the necessary level of verification information bit count for each search operation. Instead of always using excessive verification information (which would increase search time), the system uses partial verification (first verification information with lower bit count) for routine searches and reserves excessive verification (second verification information with higher bit count) for cases requiring higher reliability. This reduces average search time while maintaining error detection capability when needed.
Data Source
AI summary
A data transfer apparatus includes a first memory, a second memory, a search unit, and a data transmitting/receiving unit. The first memory holds information that associates a search key with an address. The second memory holds information that associates the address with verification information which is generated by a predetermined generation method based on at least a portion of the search key. The search unit generates the search key based on the received data, obtains, from the first memory, the address that is associated with the generated search key, obtains, from the second memory, the verification information that is associated with the obtained address, and verifies the verification information that is generated by the predetermined generation method based on at least a portion of the generated search key with the verification information obtained from the second memory. The data transmitting/receiving unit executes processing based on a result of the verification.