CAMM External Interconnect Layout for Thinner, Cooler Main Boards
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Solution Overview
Problem
The heat dissipation capability of current information processing apparatuses is poor due to the increased number of signal lines connecting the central processing unit and compression attached memory modules, leading to thicker boards and signal distortion.
Innovation Solution
An external connecting structure is used to electrically connect the central processing unit and compression attached memory module, reducing the number of signal lines on the main board and eliminating their arrangement, thereby enhancing heat dissipation and reducing thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of chips connected to the CAMM increases, then the memory capacity and functionality are improved, but the number of signal lines in the main board increases, leading to increased board thickness and reduced heat dissipation
Solution Approach 1:
The patent transitions signal transmission from a planar two-dimensional layout on the main board to a three-dimensional vertical architecture using stacking technology. Multiple chips are stacked vertically and connected via through-silicon vias (TSVs), enabling signal transmission in the vertical dimension rather than requiring expanded horizontal trace routing on the board plane. This dimensional shift allows increased chip capacity without proportionally increasing board thickness or trace density.
2Adaptability or versatility
If the number of signal lines in the main board increases, then more chips can be connected, but the trace density increases causing serious crosstalk and signal distortion
Solution Approach 1:
The patent employs three-dimensional stacking with vertical signal transmission through TSVs, moving signal paths from the horizontal plane to the vertical dimension. This spatial reconfiguration reduces trace density on the main board by routing signals through the thickness of the stacked chips rather than across the board surface, thereby minimizing crosstalk and signal distortion while maintaining high chip connection capacity.
Solution Approach 2:
The patent introduces an interposer as an intermediary component between the main board and the stacked chips. The interposer provides a dedicated signal transmission interface with controlled impedance and optimized trace routing, acting as a mediator that isolates the high-density chip interconnects from the main board's signal environment. This intermediary structure reduces signal interference and crosstalk by creating a separate, optimized signal pathway.
Data Source
AI summary
Embodiments of the present disclosure relate to an information processing apparatus. The information processing apparatus includes: a main board, provided with a first surface, where the first surface is provided with a central processing unit electrically connected to the main board; a compression attached memory module, located on one side of the first surface, where at least one surface of the compression attached memory module is provided with a plurality of chips; and an external connecting structure, located on one side of the first surface, and configured to: electrically connect the compression attached memory module and the central processing unit, where the central processing unit is configured to: read data from and write data to each chip at least via the external connecting structure.