Compress Attached Memory Module Power Management

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Solution Overview

Problem

Compress attached memory modules (CAMMs) lack a suitable power supply scheme, leading to potential voltage drops and instability under extreme conditions.

Innovation Solution

A compress attached memory module with a power management apparatus that includes a preset quantity of power management integrated circuits (PMICs) to provide stable power supply to memory chips, with the quantity of PMICs set according to the power demand of the memory chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a power management apparatus with multiple power management integrated circuits is added to the compress attached memory module, then the power supply stability and reliability are improved, but the device complexity increases

Engineering Contradiction:
Improvepower supply stabilityVSAvoidmodule structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The power management apparatus is segmented into multiple independent power management integrated circuits, each responsible for powering specific memory chips. This segmentation allows distributed power management, improving reliability by isolating failures to individual circuits while maintaining overall system stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The power management integrated circuits are designed with multi-functionality to handle different power supply scenarios. Each PMIC can operate independently or in coordination with others, providing universal power management capability across various memory chip configurations without requiring additional specialized components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If the quantity of power management integrated circuits is increased to meet high power demand, then the power supply capability is improved, but the manufacturing cost and complexity increase

Engineering Contradiction:
Improvepower supply capabilityVSAvoidpower management apparatus complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The power management apparatus employs dynamic configuration where the quantity and arrangement of power management integrated circuits can be adjusted based on the specific power demand of the memory chips. This dynamic approach allows the system to optimize between power supply capability and complexity by activating only the necessary number of PMICs for each application scenario.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system utilizes parameter changes in the power management apparatus, including adjustable voltage levels and configurable power distribution patterns. By changing operational parameters rather than simply increasing hardware quantity, the system meets high power demands while controlling complexity through software or control-based optimization.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250155946A1Compress attached memory module and device
Publication Date: 2025.05.15 RUILI INTEGRATED CIRCUIT CO LTD
  • US20250155946A1 patent drawing
  • US20250155946A1 patent drawing
  • US20250155946A1 patent drawing

AI summary

A compress attached memory module includes: a compress attached memory circuit board; a plurality of memory chips, arranged on the compress attached memory circuit board; and a power management apparatus, arranged on the compress attached memory circuit board and electrically connected to the plurality of memory chips, wherein the power management apparatus includes a preset quantity of power management integrated circuits and is configured to provide electric energy generated by the preset quantity of power management integrated circuits to the plurality of memory chips as electric energy for power supply, wherein the preset quantity of the power management integrated circuits in the power management apparatus is preset according to power demand of the plurality of memory chips.