Hardware Camouflage for Current Traces via Dynamic Clock and Voltage Adjustment
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Solution Overview
Problem
Existing solutions for mitigating side-channel attacks through signal camouflage are either costly, complex, or lead to material execution failures, necessitating a trade-off between failure risks and efficiency.
Innovation Solution
A method that dynamically adjusts and tests working conditions of hardware components using a reference datapath to minimize errors, allowing for broad jamming ranges without significant execution failures, by iteratively adjusting clock frequency and supply voltage to generate noise and obscure signal traces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If noise is introduced in perceptible signals to blind hackers to meaningful reverse analysis information, then side-channel attack risks are reduced, but material execution failures occur due to glitches and timing violations
Solution Approach 1:
The patent applies dynamics by making the delay values programmable and modifiable during operation. The delay means can be dynamically adjusted to compensate for timing variations caused by noise introduction, allowing the system to adapt to changing conditions while maintaining correct operation and avoiding execution failures
Solution Approach 2:
The patent changes the delay parameter of the critical path to compensate for timing violations. By programmably adjusting the delay means, the system can modify timing parameters to prevent glitches and execution failures that would otherwise result from introducing noise for camouflage
2Reliability
If safety margins are increased to prevent execution failures when randomly varying parameter values, then reliability is improved, but camouflage efficiency decreases
Solution Approach 1:
The patent employs feedback mechanisms where the system monitors timing conditions and adjusts delay values accordingly. This feedback loop allows the system to maintain reliability by detecting potential timing violations and compensating for them, while still achieving effective camouflage through controlled parameter variations
3Object-affected harmful factors
If broad ranges of jamming values are used to enhance camouflage, then side-channel attack protection is improved, but execution failures increase significantly
Solution Approach 1:
The patent uses programmable delay means that can be dynamically adjusted based on operating conditions. This allows the system to explore broader jamming value ranges while maintaining reliability by adapting delay values in real-time to prevent execution failures
Solution Approach 2:
The system programmably changes delay parameters to achieve broad camouflage effectiveness. By controlling the delay values through programming rather than fixed hardware, the system can test and adjust parameter ranges to find optimal values that provide strong camouflage without causing execution failures
Data Source
AI summary
Implementing a camouflage of current traces generated by a hardware component having one or more set of digital elements defining a plurality of operational datapaths comprises adjusting (761) one or more working condition(s) of the hardware component, measuring (762) a reaction of the hardware component to the working condition(s) by a logic test circuit through processing data operations along a reference datapath having a minimum duration corresponding to at least the longest of the operational datapaths, and in response to detecting an error (763) along the reference datapath, modifying (764) the working condition(s) so that the error generated by the logic test circuit is cancelled. Applications to countermeasures to side-channel attacks.