CAN Transceiver Output Buffer for Delay and Emissions Balance
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Solution Overview
Problem
The existing CAN transceiver circuitry struggles to balance propagation delay and electromagnetic emissions, particularly with the CAN-SIC standard, as high supply voltages near +5.5 V result in faster bit transitions and increased emissions, while voltages near +1.7 V lead to longer propagation delays, making it difficult to meet the 190 nanoseconds propagation delay requirement.
Innovation Solution
The implementation of logic output buffer circuitry with current-controlled transistors and additional circuitry, such as supply divider circuitry and Schmitt trigger circuitry, to conditionally slow down bit transitions when the high supply voltage is near +5.5 V, while ensuring sufficient drive strength at +1.7 V, thereby mitigating emissions and meeting the propagation delay requirement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high supply voltage near +5.5 V is used, then bit transition speed is improved, but electromagnetic emissions increase
Solution Approach 1:
The patent implements dynamic control of the inverter circuitry by using current-controlled transistors that adjust the switching current based on the supply voltage level. When supply voltage is near +5.5 V, the circuit dynamically reduces the switching current to slow down bit transitions and mitigate electromagnetic emissions, while maintaining faster transitions at lower voltages to meet propagation delay requirements.
Solution Approach 2:
The patent changes the electrical parameters (current) of the inverter circuitry based on the supply voltage condition. By monitoring the supply voltage level and adjusting the switching current accordingly, the system adapts its operational parameters to balance between transition speed and electromagnetic emissions across different voltage conditions.
2Object-generated harmful factors
If low supply voltage near +1.7 V is used, then electromagnetic emissions are reduced, but propagation delay increases
Solution Approach 1:
The system dynamically adjusts the switching current based on supply voltage conditions. When operating at lower supply voltages near +1.7 V, the circuit maintains higher switching current to ensure sufficient drive strength and meet the 190 nanosecond propagation delay requirement, while only reducing current when high supply voltage causes excessive emissions.
Solution Approach 2:
The patent implements parameter changes by adjusting the current flowing through the inverter transistors based on the detected supply voltage level. This dynamic parameter adjustment ensures that the circuit maintains appropriate transition speeds across different voltage conditions, preventing excessive propagation delay at low voltages while limiting emissions at high voltages.
3Object-generated harmful factors
If additional circuitry is added to control bit transitions, then electromagnetic emissions are mitigated, but device complexity increases
Solution Approach 1:
The patent merges the emission control function with the existing inverter circuitry by integrating current-controlled transistors directly into the logic output buffer. This consolidation allows the circuit to perform both logic inversion and electromagnetic emission mitigation through the same structural elements, reducing overall device complexity compared to adding separate control circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively mitigates electromagnetic emissions on the CAN bus while satisfying the propagation delay requirements of the CAN-SIC standard across varying high supply voltages, ensuring efficient data transfer and signal integrity.
Implementation Method 1
first inverter circuitry to invert the input voltage and produce a first inverted voltage; second inverter circuitry to invert the first inverted voltage and produce a second inverted voltage at a rate based on a first current controlled transistor
Data Source
AI summary
Methods, apparatus, systems, and articles of manufacture are disclosed to buffer an input voltage. An example apparatus includes first inverter circuitry to invert the input voltage and produce a first inverted voltage; second inverter circuitry coupled to the first inverter circuitry, the second inverter circuitry to invert the first inverted voltage and produce a second inverted voltage at a rate based on a first current controlled transistor; third inverter circuitry coupled to the second inverter circuitry, the third inverter circuitry to invert the second inverted voltage and produce a third inverted voltage at a rate based on a second current controlled transistor; and fourth inverter circuitry coupled to the third inverter circuitry, the fourth inverter circuitry to invert the third inverted voltage and produce an output voltage, wherein the output voltage matches the input voltage.