CAN Bus User Station Bit Rate Switching Synchronization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing CAN bus system faces challenges in achieving robust bit rate switching and increasing data rates due to limitations in synchronization and clock tolerance compensation, especially during transitions between different bit rates in CAN FD messages.
Innovation Solution
A user station with a communication control unit that includes a predetermined bit pattern for bit rate switching, featuring synchronization flanks before and after the switchover, allowing for better synchronization and increased clock tolerance, thereby enhancing the robustness of bit rate transitions and data transmission rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single hard synchronization is performed at the beginning of the frame, then the initial phase error is compensated, but residual phase errors accumulate between synchronizations due to clock tolerances
Solution Approach 1:
The patent implements periodic resynchronization at defined bit positions (every 10 bits or at specific synchronization points) to continuously correct phase errors. This periodic action prevents error accumulation by repeatedly resetting the phase alignment between transmitter and receiver, directly addressing the limitation of single hard synchronization.
Solution Approach 2:
The patent employs feedback mechanisms where receivers monitor phase errors and adjust their sampling points accordingly. The synchronization process uses feedback from detected phase deviations to correct timing offsets, ensuring continuous alignment despite clock tolerance variations across different bus users.
2Reliability
If the bit time is significantly longer than twice the signal propagation time, then arbitration and acknowledgement are reliable, but the data transmission rate is limited to low values
Solution Approach 1:
The patent segments the message transmission into distinct phases: an arbitration phase at the lower bit rate for reliable arbitration and acknowledgment, followed by a data phase at a higher bit rate for fast data transmission. This segmentation allows each phase to operate at the optimal bit rate for its specific function, resolving the contradiction between reliability and speed.
Solution Approach 2:
The patent implements dynamic bit rate switching within a single message frame. The system transitions from a first bit rate during arbitration to a second, higher bit rate during data transmission. This dynamic adaptation allows the system to optimize performance for each transmission stage while maintaining overall message integrity.
3Adaptability or versatility
If synchronization jump width is increased to compensate for maximum phase errors, then clock tolerance is accommodated, but the synchronization precision is reduced
Solution Approach 1:
The patent performs preliminary hard synchronization at the beginning of the frame to establish initial phase alignment before data transmission begins. This preliminary action sets a known reference point, allowing subsequent resynchronization to build upon a solid foundation rather than dealing with uncorrected initial errors.
Solution Approach 2:
The patent implements periodic resynchronization at defined intervals during data transmission to continuously correct phase errors. This periodic correction maintains synchronization precision over time while accommodating clock tolerances, preventing the accumulation of phase errors that would otherwise require large synchronization jump widths.
Data Source
AI summary
A user station for a bus system and a method for transmitting a message at different bit rates in a bus system is provided. The user station includes a communication control unit for creating a message for at least one further user station of the bus system. The communication control unit is designed to provide in the message a first phase to be transmitted at a first bit rate, and to provide a second phase to be transmitted at a second bit rate, which is faster or slower than the first bit rate. The communication control unit is designed to provide in the message between the first and second phase a predetermined bit pattern for a bit rate switchover between the first and second bit rate. The predetermined bit pattern includes, both before and after the bit rate switchover, a flank for synchronization.