CAN Bus Clock Synchronization via Merged Message Exchange

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Solution Overview

Problem

Current CAN bus synchronization methods, such as one-way, two-way, and four-way clock synchronization, require a significant number of messages to maintain accurate timing, leading to increased resource usage and potential errors, especially in systems with many nodes, where they can disrupt critical functions and consume excessive resources.

Innovation Solution

A synchronization system that reduces the number of messages exchanged during clock synchronization by allowing a single node to transmit synchronization messages to multiple nodes and receive responses, using fewer messages while maintaining authentication and accuracy, thereby conserving resources and reducing error susceptibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional clock synchronization methods (one-way, two-way, four-way) are used to maintain accurate timing in CAN bus systems, then timing accuracy is improved, but the number of messages required increases significantly, leading to increased resource consumption and potential errors

Engineering Contradiction:
Improvetiming accuracyVSAvoidnumber of messages
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent combines multiple synchronization operations into a single message exchange. Instead of requiring separate one-way, two-way, and four-way synchronization messages, the system uses a unified synchronization protocol where a master node transmits timing information that multiple slave nodes process simultaneously, reducing the total message count while maintaining timing accuracy across all nodes

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The synchronization message structure is designed to serve multiple functions simultaneously. A single synchronization message from the master node contains timing information that enables slave nodes to perform both clock synchronization and message ordering functions, eliminating the need for separate dedicated messages for each function and reducing overall communication overhead

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If traditional clock synchronization methods are used to maintain accurate timing, then timing accuracy is improved, but resource consumption increases and critical functions may be disrupted

Engineering Contradiction:
Improvetiming accuracyVSAvoidresource consumption
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent merges multiple synchronization operations into a single message exchange cycle. The master node transmits timing information once, and multiple slave nodes process this information simultaneously for both clock synchronization and message ordering, reducing the total number of messages and computational resources required compared to traditional separate synchronization protocols

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system maintains continuous timing accuracy without requiring frequent disruption of critical functions. By using a more efficient message-based approach, the synchronization process can complete faster and with fewer interruptions to normal CAN bus operations, allowing critical functions to continue executing while still achieving accurate clock synchronization across all nodes

Inventive Principle:
Principle #20Continuity of useful action

3Measurement precision

If traditional clock synchronization methods are used, then timing accuracy is maintained, but the time required for synchronization increases, reducing availability for other operations

Engineering Contradiction:
Improvetiming accuracyVSAvoidsynchronization time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent combines multiple synchronization operations into a single message exchange cycle. Instead of requiring separate one-way, two-way, and four-way synchronization messages that sequentially process timing information, the system uses a unified protocol where a master node transmits timing information that multiple slave nodes process simultaneously, reducing the total synchronization time while maintaining timing accuracy across all nodes

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10797854B1Synchronization system for controller area networks
Publication Date: 2020.10.06 INFINEON TECHNOLOGIES AG
  • US10797854B1 patent drawing
  • US10797854B1 patent drawing
  • US10797854B1 patent drawing

AI summary

A receiver device may include a receiver and one or more processors. The receiver device may be configured to receive a first set of frames from a first device indicating a transmit time of the first set of frames, and a second set of frames from a second device indicating a transmit time of the second set of frames and an arrival time of the first set of frames. The receiver device may be configured to determine a first transmission delay based on the transmit and arrival times of the first set of frames, and determine a second transmission delay based on the transmit and arrival times of the second set of frames. The receiver device may be configured to transmit a third set of frames indicating the arrival times of the first and second sets of frames, and a transmit time of the third set of frames.