CAN Bus Interference Timing Compensation for Picosecond Resolution
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Solution Overview
Problem
Conventional interference test equipment for vehicular CAN (FD) bus technology cannot achieve high-precision time compensation with a resolution lower than the nanosecond scale, affecting the accuracy of interference signal and sampling point testing.
Innovation Solution
A time compensation method and system that decomposes delay times into nanosecond and picosecond scales, using a configurable lead compensation and output module for nanosecond scale delays, and a delay compensation module with cascaded timing controllers for picosecond scale delays, applied on a CAN bus to achieve picosecond resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional interference test equipment uses MCU or FPGA with nanosecond scale clock cycles, then the device can operate at high clock frequencies up to 100 MHz, but it cannot achieve time compensation with resolution lower than nanosecond scale
Solution Approach 1:
The patent segments the time compensation system into two independent modules: a nanosecond scale lead compensation module and a picosecond scale delay compensation module. Each module handles a specific time scale, allowing the system to achieve picosecond resolution without requiring a complete redesign of the entire compensation system. The nanosecond module uses configurable logic codes while the picosecond module uses cascaded timing controllers, dividing the complex task into manageable parts.
2Measurement precision
If the interference test equipment uses a single clock cycle scale for time compensation, then the system structure remains simple, but the time compensation resolution cannot exceed the clock cycle scale
Solution Approach 1:
The patent implements dynamic time compensation by making the compensation system adaptable to different time scales. The nanosecond scale lead compensation module uses configurable lead compensation that can be adjusted through logic codes, while the picosecond scale delay compensation module uses timing controllers that can be dynamically configured. This dynamic capability allows the system to achieve variable resolution without fixed structural constraints.
3Reliability
If conventional equipment applies interference signals without picosecond scale time compensation, then the device complexity remains low, but the accuracy of interference signal application and sampling point testing is compromised
Solution Approach 1:
The patent introduces timing controllers as intermediary components between the signal generation unit and the CAN bus interface. These timing controllers act as mediators that precisely control the timing of interference signal application at the picosecond scale. By inserting this intermediary layer, the system achieves high accuracy without requiring complete redesign of the signal generation and output pathways.
Data Source
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AI summary
The present disclosure provides a time compensation method and system for interference test equipment. The method includes: obtaining a first delay time and a second delay time; decomposing the first delay time and the second delay time to obtain a nanosecond scale delay time corresponding to the first delay time and a picosecond scale delay time corresponding to the second delay time; performing lead compensation for the nanosecond scale delay time by a configurable lead compensation and output module to obtain a nanosecond scale lead compensation time; performing lag compensation for the picosecond scale delay time by a delay compensation module to obtain a picosecond scale delay compensation time, and calculating a sum of the nanosecond scale lead compensation time and the picosecond scale delay compensation time to obtain a picosecond scale lead compensation time; and applying an interference signal on a controller area network, CAN, bus based on the picosecond scale lead compensation time. Therefore, by using a plurality of timing controllers connected in cascade in the delay compensation module, the picosecond scale delay compensation time is realized.