CAN Bus Slave Node Internal Clock Generation

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Solution Overview

Problem

The requirement for each node in a CAN bus system to have an external crystal oscillator for generating a precise clock signal increases costs and complexity, as it is necessary for reliable communication across all nodes.

Innovation Solution

A slave node in the CAN bus system generates its own internal CAN clock signal by analyzing data frames transmitted over the bus for a predetermined fixed pattern, eliminating the need for an external oscillator and allowing all nodes to operate at the same effective baud rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If each node has an external crystal oscillator for generating a precise clock signal, then communication reliability is improved, but device cost and complexity increase

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidnode complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the clock signal generation function from external crystal oscillators and relocates it to the data frames themselves. The master node embeds a fixed known bit pattern in the data frame, which slave nodes use to generate their own clock signals, eliminating the need for external oscillators at each node.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The data frame acts as an intermediary carrier that transports not only communication data but also clock synchronization information. The fixed known bit pattern within the data frame serves as a mediator that enables slave nodes to derive accurate clock signals without requiring separate external oscillator components.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If each node has an external crystal oscillator, then clock synchronization is improved, but manufacturing cost increases

Engineering Contradiction:
Improveclock synchronizationVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The invention replaces expensive external crystal oscillators with a software-based clock generation mechanism using fixed known bit patterns embedded in data frames. This disposable approach to clock synchronization (using data frame patterns rather than permanent hardware oscillators) significantly reduces manufacturing costs while maintaining synchronization accuracy.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The invention changes the parameter of clock signal generation from hardware-based (external crystal oscillators) to software-based (bit pattern analysis in data frames). This parameter change transforms the clock synchronization mechanism from a hardware component requirement to a data processing function, reducing manufacturing costs.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If nodes use internal oscillators without external crystals, then device complexity is reduced, but clock accuracy may deteriorate

Engineering Contradiction:
Improvenode complexityVSAvoidclock accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The invention implements a feedback mechanism where slave nodes continuously monitor the fixed known bit pattern in incoming data frames and adjust their internally generated clock signals accordingly. This feedback loop ensures that even though nodes use internal oscillators instead of external crystals, the clock accuracy is maintained through continuous synchronization with the master node's timing.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The master node performs preliminary action by embedding the fixed known bit pattern in the data frame before transmission. This pre-prepared synchronization signal allows slave nodes to immediately generate accurate clock signals upon receiving the data frame, without requiring external crystal oscillators.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables cost-effective and reliable communication across the CAN bus system without the need for external oscillators, ensuring accurate clock synchronization and efficient data transmission, while maintaining the integrity of the existing CAN protocol.

Implementation Method 1

The slave node monitors the CAN bus, analyzes data frames transmitted over the CAN bus for a predetermined fixed pattern, and uses the predetermined fixed pattern to generate the slave node CAN clock signal

Methodology Applied
Scientific EffectPattern detection:

Implementation Method 2

A phase-locked loop is used in the slave device, in this context, which utilizes a predetermined bit pattern, that is extracted from a frame sent by the master device via the bus system, as reference signal

Methodology Applied
Scientific EffectPhase-locked loop:

Data Source

PatentEP3576354B1Slave node for a can bus network
Publication Date: 2021.07.28 NXP BV
  • EP3576354B1 patent drawingFigure 1~5
  • EP3576354B1 patent drawingFigure 2~3
  • EP3576354B1 patent drawingFigure 4

AI summary

A CAN bus system that permits a slave node to be connected to the CAN bus. The slave node uses a preamble of a data frame transmitted by the master node on the bus to generate an internal CAN sampling clock. The slave node over-samples frames transmitted over the bus, and monitors the sampled data for a predetermined pattern, which is used to generate the slave node CAN sampling clock. Thus, the slave node does not require or include an external crystal for generating its CAN sampling clock.