CAN Controller DMA Selective Message Transfer

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In data processing devices equipped with CAN controllers, the CPU load and system bus traffic increase due to the need to transfer all received messages, including sensor information and diagnostic results, which are not always necessary, leading to inefficiencies in processing and communication.

Innovation Solution

A data processing device with a CAN controller that includes a receive buffer and a DMA controller, which selectively transfers only the latest messages with specific IDs to memory, reducing CPU load and system bus traffic by using a direct memory access mechanism to manage message transfer based on predefined rules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all received messages are transferred to memory area, then CPU can access all necessary data, but CPU load and system bus traffic increase

Engineering Contradiction:
Improvedata completenessVSAvoidCPU load
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts only the necessary information (latest sensor values with specific IDs) from the complete message set and transfers just those to memory, rather than transferring all messages. This selective extraction reduces the data volume transferred to memory, thereby reducing CPU load and system bus traffic while maintaining access to required data.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by transferring only a subset of messages (those with specific IDs representing latest sensor values) rather than all received messages. This partial transfer approach reduces the burden on CPU and system bus while still providing sufficient data for processing purposes.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If all received messages are transferred to memory area, then CPU can process all data, but system bus traffic increases

Engineering Contradiction:
Improvedata completenessVSAvoidsystem bus traffic
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts only the necessary information (latest sensor values with specific IDs) from the complete message set and transfers just those to memory, rather than transferring all messages. This selective extraction reduces the data volume transferred to memory, thereby reducing CPU load and system bus traffic while maintaining access to required data.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by transferring only a subset of messages (those with specific IDs representing latest sensor values) rather than all received messages. This partial transfer approach reduces the burden on CPU and system bus while still providing sufficient data for processing purposes.

Inventive Principle:
Principle #16Partial or excessive action

3Loss of information

If all sensor information is transferred, then CPU has complete data, but unnecessary data transfer occurs

Engineering Contradiction:
Improvedata completenessVSAvoiddata transfer efficiency
Core Design Contradiction:
Loss of informationVSLoss of energy

Solution Approach 1:

The patent extracts only the necessary information (latest sensor values with specific IDs) from the complete message set and transfers just those to memory, rather than transferring all messages. This selective extraction reduces the data volume transferred to memory, thereby reducing CPU load and system bus traffic while maintaining access to required data.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by transferring only a subset of messages (those with specific IDs representing latest sensor values) rather than all received messages. This partial transfer approach reduces the burden on CPU and system bus while still providing sufficient data for processing purposes.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11677829B2Data processing device and data processing system
Publication Date: 2023.06.13 RENESAS ELECTRONICS CORP
  • US11677829B2 patent drawing
  • US11677829B2 patent drawing
  • US11677829B2 patent drawing

AI summary

A data processing device includes a first CPU (Central Processing Unit), a first memory, a CAN (Controller Area Network) controller and a system bus coupled to the first CPU, the first memory and the CAN controller, wherein the CAN controller comprises a receive buffer that stores a plurality of messages each of which has a different ID, and a DMA (Direct Memory Access) controller that selects the latest message among messages having a fist ID stored in the receive buffer and transfers the selected latest message to the first memory, wherein the message is one of CAN, CAN FD and CAN XL messages.